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authorSwapnil Jakhade <sjakhade@cadence.com>2021-03-04 07:08:16 +0100
committerVinod Koul <vkoul@kernel.org>2021-03-30 23:34:14 +0530
commited9e07f815cd66405895781dd29033c1a7b47b8a (patch)
tree7fe069075fc5c71d2f52873e6815ab3e5fc05449 /kernel
parent70901a7d64cb018df452b1a2880aba7f4416f508 (diff)
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phy: cadence-torrent: Update PCIe + USB config for correct PLL1 clock
Update PCIe + USB register sequences for correct PLL1 clock configuration. Also, update sequences for other USB configurations with dependent changes. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/1614838096-32291-5-git-send-email-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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