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authorStephen Boyd <sboyd@codeaurora.org>2014-08-04 18:31:44 -0700
committerKumar Gala <galak@codeaurora.org>2015-01-19 11:53:31 -0600
commit30cbb0c01bc98a2372966b8c5ac0ce1421cd933c (patch)
tree487d86524ba1f4cb9a5f41613cd6013dc3cfc9b0 /lib/lz4
parentf76c6916570d8d24a622f2107ef747531148046e (diff)
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ARM: qcom: scm: Get cacheline size from CTR
Instead of hardcoding the cacheline size as 32, get the cacheline size from the CTR register. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
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