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authorWill Deacon <will@kernel.org>2022-03-14 19:04:22 +0000
committerWill Deacon <will@kernel.org>2022-03-14 19:04:22 +0000
commit8d93b7a242b2adf36949c10b8eb9cc084a74b59a (patch)
treedc6a45f281eb89c5b35ceef5698400b9ee11b237 /lib/test_siphash.c
parent515e5da7b6b52c5d6c7a54fe34165b86361041b5 (diff)
parentf2c281204b47309534f26dc63cee2a130c2b497b (diff)
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Merge branch 'for-next/fpsimd' into for-next/core
* for-next/fpsimd: arm64: cpufeature: Warn if we attempt to read a zero width field arm64: cpufeature: Add missing .field_width for GIC system registers arm64: signal: nofpsimd: Do not allocate fp/simd context when not available arm64: cpufeature: Always specify and use a field width for capabilities arm64: Always use individual bits in CPACR floating point enables arm64: Define CPACR_EL1_FPEN similarly to other floating point controls
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