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authorShanker Donthineni <shankerd@codeaurora.org>2016-06-06 18:17:32 -0500
committerMarc Zyngier <marc.zyngier@arm.com>2016-06-13 11:53:53 +0100
commit3faf24ea894a34887c0ca412f1643540251b9d82 (patch)
treed9a76efb52099343bbe054c007146995c35ee1aa /mm
parent0e0b0f69c5c528a750479c9bc9ba904df014517c (diff)
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irqchip/gicv3-its: Implement two-level(indirect) device table support
Since device IDs are extremely sparse, the single, a.k.a flat table is not sufficient for the following two reasons. 1) According to ARM-GIC spec, ITS hw can access maximum of 256(pages)* 64K(pageszie) bytes. In the best case, it supports upto DEVid=21 sparse with minimum device table entry size 8bytes. 2) The maximum memory size that is possible without memblock depends on MAX_ORDER. 4MB on 4K page size kernel with default MAX_ORDER, so it supports DEVid range 19bits. The two-level device table feature brings us two advantages, the first is a very high possibility of supporting upto 32bit sparse, and the second one is the best utilization of memory allocation. The feature is enabled automatically during driver probe if the memory requirement is more than 2*ITS-pages and the hardware is capable of two-level table walk. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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