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| author | Voon Weifeng <weifeng.voon@intel.com> | 2021-03-18 08:50:52 +0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-03-18 14:34:07 -0700 |
| commit | e49aa315cb01828e7aec0710f3b954e80ba70dd8 (patch) | |
| tree | 8aa370ee6745e43c45b8c9e353dbea7a28e70dc3 /mm | |
| parent | 09bef8326853d61e81bcd95f955c7688cea09c97 (diff) | |
| download | linux-stable-e49aa315cb01828e7aec0710f3b954e80ba70dd8.tar.gz linux-stable-e49aa315cb01828e7aec0710f3b954e80ba70dd8.tar.bz2 linux-stable-e49aa315cb01828e7aec0710f3b954e80ba70dd8.zip | |
net: stmmac: EST interrupts handling and error reporting
Enabled EST related interrupts as below:
1) Constant Gate Control Error (CGCE)
2) Head-of-Line Blocking due to Scheduling (HLBS)
3) Head-of-Line Blocking due to Frame Size (HLBF).
4) Base Time Register error (BTRE)
5) Switch to S/W owned list Complete (SWLC)
For HLBS, the user will get the info of all the queues that shows this
error. For HLBF, the user will get the info of all the queue with the
latest frame size which causes the error. Frame size 0 indicates no
error.
The ISR handling takes place when EST feature is enabled by user.
Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com>
Co-developed-by: Mohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com>
Signed-off-by: Mohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'mm')
0 files changed, 0 insertions, 0 deletions