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authorPaolo Abeni <pabeni@redhat.com>2023-04-27 12:39:11 +0200
committerPaolo Abeni <pabeni@redhat.com>2023-04-27 12:39:11 +0200
commit075cafffce2429dfa0085c98162657e88d11aa1d (patch)
tree869648d2e0fcdc0f163f1b90b56a6b7511351b62 /net/sched
parentc23ae5091a8b3e50fe755257df020907e7c029bb (diff)
parent3c99bace4ad08ad0264285ba8ad73117560992c2 (diff)
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Merge branch 'macsec-fixes-for-cn10kb'
Geetha sowjanya says: ==================== Macsec fixes for CN10KB This patch set has fixes for the issues encountered while testing macsec on CN10KB silicon. Below is the description of patches: Patch 1: For each LMAC two MCSX_MCS_TOP_SLAVE_CHANNEL_CFG registers exist in CN10KB. Bypass has to be disabled in two registers. Patch 2: Add workaround for errata w.r.t accessing TCAM DATA and MASK registers. Patch 3: Fixes the parser configuration to allow PTP traffic. Patch 4: Addresses the IP vector and block level interrupt mask changes. Patch 5: Fix NULL pointer crashes when rebooting Patch 6: Since MCS is global block shared by all LMACS the TCAM match must include macsec DMAC also to distinguish each macsec interface Patch 7: Before freeing MCS hardware resource to AF clear the stats also. Patch 8: Stats which share single counter in hardware are tracked in software. This tracking was based on wrong secy mode params. Use correct secy mode params Patch 9: When updating secy mode params, PN number was also reset to initial values. Hence do not write to PN value register when updating secy. ==================== Link: https://lore.kernel.org/r/20230426062528.20575-1-gakula@marvell.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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