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author | Peter Zijlstra <peterz@infradead.org> | 2021-06-22 16:21:01 +0200 |
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committer | Peter Zijlstra <peterz@infradead.org> | 2021-06-23 18:30:56 +0200 |
commit | 012669c740e6e2afa8bdb95394d06676f933dd2d (patch) | |
tree | de93710750d6a1ce1b4480ceb1730c0e16c5bb4f /samples | |
parent | 1d5c7880992a06679585e7e568cc679c0c5fd4f2 (diff) | |
download | linux-stable-012669c740e6e2afa8bdb95394d06676f933dd2d.tar.gz linux-stable-012669c740e6e2afa8bdb95394d06676f933dd2d.tar.bz2 linux-stable-012669c740e6e2afa8bdb95394d06676f933dd2d.zip |
perf: Fix task context PMU for Hetero
On HETEROGENEOUS hardware (ARM big.Little, Intel Alderlake etc.) each
CPU might have a different hardware PMU. Since each such PMU is
represented by a different struct pmu, but we only have a single HW
task context.
That means that the task context needs to switch PMU type when it
switches CPUs.
Not doing this means that ctx->pmu calls (pmu_{dis,en}able(),
{start,commit,cancel}_txn() etc.) are called against the wrong PMU and
things will go wobbly.
Fixes: f83d2f91d259 ("perf/x86/intel: Add Alder Lake Hybrid support")
Reported-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Kan Liang <kan.liang@linux.intel.com>
Link: https://lkml.kernel.org/r/YMsy7BuGT8nBTspT@hirez.programming.kicks-ass.net
Diffstat (limited to 'samples')
0 files changed, 0 insertions, 0 deletions