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| author | Anup Patel <anup.patel@broadcom.com> | 2016-03-28 10:18:30 +0530 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2016-05-31 11:00:24 -0700 |
| commit | ac9aae00f0fc417a481b869b5bdc725df4609ecf (patch) | |
| tree | 024bbdd984a79dde52282b9c631e5fe3ce5b3316 /scripts/gdb/linux/utils.py | |
| parent | 6e62688c1d0b568fa5451341bdd7f382c80ac338 (diff) | |
| download | linux-stable-ac9aae00f0fc417a481b869b5bdc725df4609ecf.tar.gz linux-stable-ac9aae00f0fc417a481b869b5bdc725df4609ecf.tar.bz2 linux-stable-ac9aae00f0fc417a481b869b5bdc725df4609ecf.zip | |
arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2
We have one dual-port SATA3 AHCI controller present in
NS2 SoC.
This patch enables SATA3 AHCI controller and SATA3 PHY
for NS2 SoC in NS2 DT.
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions