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authorPuranjay Mohan <puranjay12@gmail.com>2023-09-07 23:05:43 +0000
committerAlexei Starovoitov <ast@kernel.org>2023-09-15 17:16:56 -0700
commitf9e6981b1f1ce5e954e4e9b82e6d3e564d4a3254 (patch)
tree5e125b516330bfc497d3b6a44d2246dd507b32b6 /sound/firewire
parent471f3d4ee4a6db5c8621bb1c186a1d20a0639630 (diff)
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arm32, bpf: add support for sign-extension load instruction
The cpuv4 added the support of an instruction that is similar to load but also sign-extends the result after the load. BPF_MEMSX | <size> | BPF_LDX means dst = *(signed size *) (src + offset) here <size> can be one of BPF_B, BPF_H, BPF_W. ARM32 has instructions to load a byte or a half word with sign extension into a 32bit register. As the JIT uses two 32 bit registers to simulate a 64-bit BPF register, an extra instruction is emitted to sign-extent the result up to the second register. Signed-off-by: Puranjay Mohan <puranjay12@gmail.com> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://lore.kernel.org/r/20230907230550.1417590-3-puranjay12@gmail.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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