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authorCezary Rojewski <cezary.rojewski@intel.com>2022-07-07 14:41:51 +0200
committerMark Brown <broonie@kernel.org>2022-07-08 18:53:26 +0100
commit4b38bd16ca6d8b16c1dc2cc4aa61663193b0b893 (patch)
tree55ff170635a445355441f3e7fb4d682c56466402 /sound/soc/intel
parent79c351fb50e7e37eacf93f55f1e7056148d0d814 (diff)
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ASoC: Intel: avs: Replace hardcodes with SD_CTL_STREAM_RESET
Improve readability of CLDMA reset operation by making use of already defined SD_CTL_STREAM_RESET. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20220707124153.1858249-11-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/intel')
-rw-r--r--sound/soc/intel/avs/cldma.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/sound/soc/intel/avs/cldma.c b/sound/soc/intel/avs/cldma.c
index d100c6ba4d8a..d7a9390b5e48 100644
--- a/sound/soc/intel/avs/cldma.c
+++ b/sound/soc/intel/avs/cldma.c
@@ -176,17 +176,17 @@ int hda_cldma_reset(struct hda_cldma *cl)
return ret;
}
- snd_hdac_stream_updateb(cl, SD_CTL, 1, 1);
- ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, (reg & 1), AVS_CL_OP_INTERVAL_US,
- AVS_CL_OP_TIMEOUT_US);
+ snd_hdac_stream_updateb(cl, SD_CTL, SD_CTL_STREAM_RESET, SD_CTL_STREAM_RESET);
+ ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, (reg & SD_CTL_STREAM_RESET),
+ AVS_CL_OP_INTERVAL_US, AVS_CL_OP_TIMEOUT_US);
if (ret < 0) {
dev_err(cl->dev, "cldma set SRST failed: %d\n", ret);
return ret;
}
- snd_hdac_stream_updateb(cl, SD_CTL, 1, 0);
- ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, !(reg & 1), AVS_CL_OP_INTERVAL_US,
- AVS_CL_OP_TIMEOUT_US);
+ snd_hdac_stream_updateb(cl, SD_CTL, SD_CTL_STREAM_RESET, 0);
+ ret = snd_hdac_stream_readb_poll(cl, SD_CTL, reg, !(reg & SD_CTL_STREAM_RESET),
+ AVS_CL_OP_INTERVAL_US, AVS_CL_OP_TIMEOUT_US);
if (ret < 0) {
dev_err(cl->dev, "cldma unset SRST failed: %d\n", ret);
return ret;