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| author | Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> | 2023-05-15 15:10:20 +0800 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2023-05-27 16:06:45 +0530 |
| commit | 6ab915b9c355caa1f80e9e383892052523f49d1f (patch) | |
| tree | 5edae5f5bfc442a3fbd45e1c4d1782aae6855063 /sound/soc | |
| parent | 6f23f4e2c62b086d92b6ee707843e8bf821283d7 (diff) | |
| download | linux-stable-6ab915b9c355caa1f80e9e383892052523f49d1f.tar.gz linux-stable-6ab915b9c355caa1f80e9e383892052523f49d1f.tar.bz2 linux-stable-6ab915b9c355caa1f80e9e383892052523f49d1f.zip | |
soundwire/ASOC: Intel: update offsets for LunarLake
The previous settings are not applicable, use a flag to determine what
the register layout is.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Acked-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230515071042.2038-5-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'sound/soc')
| -rw-r--r-- | sound/soc/sof/intel/hda.c | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/sound/soc/sof/intel/hda.c b/sound/soc/sof/intel/hda.c index 3153e21f100a..793baf60c78b 100644 --- a/sound/soc/sof/intel/hda.c +++ b/sound/soc/sof/intel/hda.c @@ -158,6 +158,7 @@ static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev) static int hda_sdw_probe(struct snd_sof_dev *sdev) { + const struct sof_intel_dsp_desc *chip; struct sof_intel_hda_dev *hdev; struct sdw_intel_res res; void *sdw; @@ -166,10 +167,22 @@ static int hda_sdw_probe(struct snd_sof_dev *sdev) memset(&res, 0, sizeof(res)); - res.hw_ops = &sdw_intel_cnl_hw_ops; - res.mmio_base = sdev->bar[HDA_DSP_BAR]; - res.shim_base = hdev->desc->sdw_shim_base; - res.alh_base = hdev->desc->sdw_alh_base; + chip = get_chip_info(sdev->pdata); + if (chip->hw_ip_version < SOF_INTEL_ACE_2_0) { + res.mmio_base = sdev->bar[HDA_DSP_BAR]; + res.hw_ops = &sdw_intel_cnl_hw_ops; + res.shim_base = hdev->desc->sdw_shim_base; + res.alh_base = hdev->desc->sdw_alh_base; + res.ext = false; + } else { + res.mmio_base = sdev->bar[HDA_DSP_HDA_BAR]; + /* + * the SHIM and SoundWire register offsets are link-specific + * and will be determined when adding auxiliary devices + */ + res.hw_ops = &sdw_intel_lnl_hw_ops; + res.ext = true; + } res.irq = sdev->ipc_irq; res.handle = hdev->info.handle; res.parent = sdev->dev; |