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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2024-03-07 18:37:34 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2024-03-07 16:47:01 +0000 |
| commit | 6c023ad32b192dea51a4f842cc6ecf89bb6238c9 (patch) | |
| tree | ead0fb82fa3858ee6dc6beca64b5716eb2074fc1 /sound | |
| parent | 5b876c340c63e2fabce003b4fb31040517ab1e10 (diff) | |
| download | linux-stable-6c023ad32b192dea51a4f842cc6ecf89bb6238c9.tar.gz linux-stable-6c023ad32b192dea51a4f842cc6ecf89bb6238c9.tar.bz2 linux-stable-6c023ad32b192dea51a4f842cc6ecf89bb6238c9.zip | |
ASoC: Intel: catpt: Carefully use PCI bitwise constants
PM constants for PCI devices are defined with bitwise annotation.
When used as is, sparse complains about that:
.../catpt/dsp.c:390:9: warning: restricted pci_power_t degrades to integer
.../catpt/dsp.c:414:9: warning: restricted pci_power_t degrades to integer
Force them to be u32 in the driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://msgid.link/r/20240307163734.3852754-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/intel/catpt/dsp.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sound/soc/intel/catpt/dsp.c b/sound/soc/intel/catpt/dsp.c index 346bec000306..5454c6d9ab5b 100644 --- a/sound/soc/intel/catpt/dsp.c +++ b/sound/soc/intel/catpt/dsp.c @@ -387,7 +387,7 @@ int catpt_dsp_power_down(struct catpt_dev *cdev) mask = cdev->spec->d3srampgd_bit | cdev->spec->d3pgd_bit; catpt_updatel_pci(cdev, VDRTCTL0, mask, cdev->spec->d3pgd_bit); - catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, PCI_D3hot); + catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D3hot); /* give hw time to drop off */ udelay(50); @@ -411,7 +411,7 @@ int catpt_dsp_power_up(struct catpt_dev *cdev) val = mask & (~CATPT_VDRTCTL2_DTCGE); catpt_updatel_pci(cdev, VDRTCTL2, mask, val); - catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, PCI_D0); + catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D0); /* SRAM power gating none */ mask = cdev->spec->d3srampgd_bit | cdev->spec->d3pgd_bit; |