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author | Dave Jiang <dave.jiang@intel.com> | 2023-02-14 11:41:08 -0800 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2023-02-14 15:45:21 -0800 |
commit | 1acba6e9206c655f8eb6736c7cafbf022492f36d (patch) | |
tree | 14b69022e3b9cf1a8e99a22e0b657806ddb4566e /tools/testing/cxl/Kbuild | |
parent | 6d796c50f84ca79f1722bb131799e5a5710c4700 (diff) | |
download | linux-stable-1acba6e9206c655f8eb6736c7cafbf022492f36d.tar.gz linux-stable-1acba6e9206c655f8eb6736c7cafbf022492f36d.tar.bz2 linux-stable-1acba6e9206c655f8eb6736c7cafbf022492f36d.zip |
cxl/pci: Break out range register decoding from cxl_hdm_decode_init()
There are 2 scenarios that requires additional handling. 1. A device that
has active ranges in DVSEC range registers (RR) but no HDM decoder register
block. 2. A device that has both RR active and HDM, but the HDM decoders
are not programmed. The goal is to create emulated decoder software structs
based on the RR.
Move the CXL DVSEC range register decoding code block from
cxl_hdm_decode_init() to its own function. Refactor code in preparation for
the HDM decoder emulation. There is no functionality change to the code.
Name the new function to cxl_dvsec_rr_decode().
The only change is to set range->start and range->end to CXL_RESOURCE_NONE
and skipping the reading of base registers if the range size is 0, which
equates to range not active.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/167640366839.935665.11816388524993234329.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'tools/testing/cxl/Kbuild')
0 files changed, 0 insertions, 0 deletions