diff options
author | Len Brown <len.brown@intel.com> | 2017-11-08 23:15:42 -0500 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2018-06-01 12:13:06 -0400 |
commit | fd3933ca7bcf500f7f204d16f670b64cceb11898 (patch) | |
tree | c7cb4b6cf7e3c5ddd5701dd1354d49e75b9e3597 /tools | |
parent | 47936f944e7816296888fb4c135f40635083080b (diff) | |
download | linux-stable-fd3933ca7bcf500f7f204d16f670b64cceb11898.tar.gz linux-stable-fd3933ca7bcf500f7f204d16f670b64cceb11898.tar.bz2 linux-stable-fd3933ca7bcf500f7f204d16f670b64cceb11898.zip |
tools/power turbostat: fix MSR_IA32_MISC_ENABLE MWAIT printout
MSR_IA32_MISC_ENABLE[18] is the MWAIT ENABLE bit, not DISABLE bit...
so
MSR_IA32_MISC_ENABLE: 0x00850089 (TCC EIST No-MWAIT PREFETCH TURBO)
should print as:
MSR_IA32_MISC_ENABLE: 0x00850089 (TCC EIST MWAIT PREFETCH TURBO)
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'tools')
-rw-r--r-- | tools/power/x86/turbostat/turbostat.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c index dd18aac6ccb2..32f3a33a9850 100644 --- a/tools/power/x86/turbostat/turbostat.c +++ b/tools/power/x86/turbostat/turbostat.c @@ -4056,7 +4056,7 @@ void decode_misc_enable_msr(void) base_cpu, msr, msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-", msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-", - msr & MSR_IA32_MISC_ENABLE_MWAIT ? "No-" : "", + msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-", msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "", msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : ""); } |