diff options
| -rw-r--r-- | drivers/gpu/drm/xe/xe_reg_sr.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_rtp_types.h | 5 |
2 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c index 7c88352636d2..264520015861 100644 --- a/drivers/gpu/drm/xe/xe_reg_sr.c +++ b/drivers/gpu/drm/xe/xe_reg_sr.c @@ -153,15 +153,15 @@ static void apply_one_mmio(struct xe_gt *gt, struct xe_reg_sr_entry *entry) u32 val; /* - * If this is a masked register, need to figure what goes on the upper - * 16 bits: it's either the clr_bits (when using FIELD_SET and WR) or - * the set_bits, when using SET. + * If this is a masked register, need to set the upper 16 bits. + * Set them to clr_bits since that is always a superset of the bits + * being modified. * * When it's not masked, we have to read it from hardware, unless we are * supposed to set all bits. */ if (reg.masked) - val = (entry->clr_bits ?: entry->set_bits) << 16; + val = entry->clr_bits << 16; else if (entry->clr_bits + 1) val = (reg.mcr ? xe_gt_mcr_unicast_read_any(gt, reg_mcr) : diff --git a/drivers/gpu/drm/xe/xe_rtp_types.h b/drivers/gpu/drm/xe/xe_rtp_types.h index d170532a98a5..637acc7626a4 100644 --- a/drivers/gpu/drm/xe/xe_rtp_types.h +++ b/drivers/gpu/drm/xe/xe_rtp_types.h @@ -22,7 +22,10 @@ struct xe_gt; struct xe_rtp_action { /** @reg: Register */ struct xe_reg reg; - /** @clr_bits: bits to clear when updating register */ + /** + * @clr_bits: bits to clear when updating register. It's always a + * superset of bits being modified + */ u32 clr_bits; /** @set_bits: bits to set when updating register */ u32 set_bits; |