diff options
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 15 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link.c | 20 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 16 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 1 |
4 files changed, 52 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c index 0e58c1ab414c..9305630e9505 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -599,6 +599,21 @@ static void set_dsc_configs_from_fairness_vars(struct dsc_mst_fairness_params *p } else { params[i].timing->flags.DSC = 0; } + params[i].timing->dsc_cfg.mst_pbn = vars[i + k].pbn; + } + + for (i = 0; i < count; i++) { + if (params[i].sink) { + if (params[i].sink->sink_signal != SIGNAL_TYPE_VIRTUAL && + params[i].sink->sink_signal != SIGNAL_TYPE_NONE) + DRM_DEBUG_DRIVER("%s i=%d dispname=%s\n", __func__, i, + params[i].sink->edid_caps.display_name); + } + + DRM_DEBUG_DRIVER("dsc=%d bits_per_pixel=%d pbn=%d\n", + params[i].timing->flags.DSC, + params[i].timing->dsc_cfg.bits_per_pixel, + vars[i + k].pbn); } } diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index b1718600fa02..48858e31b092 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -4082,6 +4082,15 @@ void core_link_enable_stream( DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger); + if (pipe_ctx->stream->sink) { + if (pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL && + pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_NONE) { + DC_LOG_DC("%s pipe_ctx dispname=%s signal=%x\n", __func__, + pipe_ctx->stream->sink->edid_caps.display_name, + pipe_ctx->stream->signal); + } + } + if (!IS_DIAG_DC(dc->ctx->dce_environment) && dc_is_virtual_signal(pipe_ctx->stream->signal)) return; @@ -4303,6 +4312,17 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx) if (is_dp_128b_132b_signal(pipe_ctx)) vpg = pipe_ctx->stream_res.hpo_dp_stream_enc->vpg; + DC_LOGGER_INIT(pipe_ctx->stream->ctx->logger); + + if (pipe_ctx->stream->sink) { + if (pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL && + pipe_ctx->stream->sink->sink_signal != SIGNAL_TYPE_NONE) { + DC_LOG_DC("%s pipe_ctx dispname=%s signal=%x\n", __func__, + pipe_ctx->stream->sink->edid_caps.display_name, + pipe_ctx->stream->signal); + } + } + if (!IS_DIAG_DC(dc->ctx->dce_environment) && dc_is_virtual_signal(pipe_ctx->stream->signal)) return; diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c index 57cf4cb82370..263f9891ecbc 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c @@ -737,5 +737,21 @@ void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream) DC_LOG_DC( "\tlink: %d\n", stream->link->link_index); + + DC_LOG_DC( + "\tdsc: %d, mst_pbn: %d\n", + stream->timing.flags.DSC, + stream->timing.dsc_cfg.mst_pbn); + + if (stream->sink) { + if (stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL && + stream->sink->sink_signal != SIGNAL_TYPE_NONE) { + + DC_LOG_DC( + "\tdispname: %s signal: %x\n", + stream->sink->edid_caps.display_name, + stream->signal); + } + } } diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h index eac34f591a3f..c964f598755a 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_hw_types.h @@ -745,6 +745,7 @@ struct dc_dsc_config { bool is_frl; /* indicate if DSC is applied based on HDMI FRL sink's capability */ #endif bool is_dp; /* indicate if DSC is applied based on DP's capability */ + uint32_t mst_pbn; /* pbn of display on dsc mst hub */ }; struct dc_crtc_timing { uint32_t h_total; |