diff options
Diffstat (limited to 'arch/mips/alchemy')
| -rw-r--r-- | arch/mips/alchemy/Platform | 6 | ||||
| -rw-r--r-- | arch/mips/alchemy/board-gpr.c | 12 | ||||
| -rw-r--r-- | arch/mips/alchemy/board-mtx1.c | 8 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/dbdma.c | 14 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/gpiolib.c | 14 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/irq.c | 178 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/platform.c | 4 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/setup.c | 2 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/sleeper.S | 20 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/time.c | 2 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/usb.c | 2 | ||||
| -rw-r--r-- | arch/mips/alchemy/devboards/bcsr.c | 2 | ||||
| -rw-r--r-- | arch/mips/alchemy/devboards/db1000.c | 16 | ||||
| -rw-r--r-- | arch/mips/alchemy/devboards/db1200.c | 28 | ||||
| -rw-r--r-- | arch/mips/alchemy/devboards/db1300.c | 10 | ||||
| -rw-r--r-- | arch/mips/alchemy/devboards/db1550.c | 18 | ||||
| -rw-r--r-- | arch/mips/alchemy/devboards/pm.c | 2 |
17 files changed, 169 insertions, 169 deletions
diff --git a/arch/mips/alchemy/Platform b/arch/mips/alchemy/Platform index 942c5800a684..fa1bdd1aea15 100644 --- a/arch/mips/alchemy/Platform +++ b/arch/mips/alchemy/Platform @@ -1,7 +1,7 @@ # # Core Alchemy code # -platform-$(CONFIG_MIPS_ALCHEMY) += alchemy/common/ +platform-$(CONFIG_MIPS_ALCHEMY) += alchemy/common/ # @@ -45,7 +45,7 @@ load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000 # # MyCable eval board # -platform-$(CONFIG_MIPS_XXS1500) += alchemy/ +platform-$(CONFIG_MIPS_XXS1500) += alchemy/ load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000 # @@ -56,7 +56,7 @@ load-$(CONFIG_MIPS_GPR) += 0xffffffff80100000 # boards can specify their own <gpio.h> in one of their include dirs. # If they do, placing this line here at the end will make sure the -# compiler picks the board one. If they don't, it will make sure +# compiler picks the board one. If they don't, it will make sure # the alchemy generic gpio header is picked up. cflags-$(CONFIG_MIPS_ALCHEMY) += -I$(srctree)/arch/mips/include/asm/mach-au1x00 diff --git a/arch/mips/alchemy/board-gpr.c b/arch/mips/alchemy/board-gpr.c index ba3259086b9d..cb0f6afb7389 100644 --- a/arch/mips/alchemy/board-gpr.c +++ b/arch/mips/alchemy/board-gpr.c @@ -135,33 +135,33 @@ static struct mtd_partition gpr_mtd_partitions[] = { { .name = "kernel", .size = 0x00200000, - .offset = 0, + .offset = 0, }, { .name = "rootfs", .size = 0x00800000, - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, .mask_flags = MTD_WRITEABLE, }, { .name = "config", .size = 0x00200000, - .offset = 0x01d00000, + .offset = 0x01d00000, }, { .name = "yamon", .size = 0x00100000, - .offset = 0x01c00000, + .offset = 0x01c00000, }, { .name = "yamon env vars", .size = 0x00040000, - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, }, { .name = "kernel+rootfs", .size = 0x00a00000, - .offset = 0, + .offset = 0, }, }; diff --git a/arch/mips/alchemy/board-mtx1.c b/arch/mips/alchemy/board-mtx1.c index a124c251c0c9..4a9baa9f6330 100644 --- a/arch/mips/alchemy/board-mtx1.c +++ b/arch/mips/alchemy/board-mtx1.c @@ -173,23 +173,23 @@ static struct mtd_partition mtx1_mtd_partitions[] = { { .name = "filesystem", .size = 0x01C00000, - .offset = 0, + .offset = 0, }, { .name = "yamon", .size = 0x00100000, - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, .mask_flags = MTD_WRITEABLE, }, { .name = "kernel", .size = 0x002c0000, - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, }, { .name = "yamon env", .size = 0x00040000, - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, }, }; diff --git a/arch/mips/alchemy/common/dbdma.c b/arch/mips/alchemy/common/dbdma.c index cf02d7dc2df0..19d5642c16d9 100644 --- a/arch/mips/alchemy/common/dbdma.c +++ b/arch/mips/alchemy/common/dbdma.c @@ -252,7 +252,7 @@ EXPORT_SYMBOL(au1xxx_ddma_del_device); u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, void (*callback)(int, void *), void *callparam) { - unsigned long flags; + unsigned long flags; u32 used, chan; u32 dcp; int i; @@ -512,7 +512,7 @@ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries) break; } - /* If source input is FIFO, set static address. */ + /* If source input is FIFO, set static address. */ if (stp->dev_flags & DEV_FLAGS_IN) { if (stp->dev_flags & DEV_FLAGS_BURSTABLE) src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST); @@ -635,7 +635,7 @@ u32 au1xxx_dbdma_put_source(u32 chanid, dma_addr_t buf, int nbytes, u32 flags) dma_cache_wback_inv((unsigned long)dp, sizeof(*dp)); ctp->chan_ptr->ddma_dbell = 0; - /* Get next descriptor pointer. */ + /* Get next descriptor pointer. */ ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); /* Return something non-zero. */ @@ -697,7 +697,7 @@ u32 au1xxx_dbdma_put_dest(u32 chanid, dma_addr_t buf, int nbytes, u32 flags) dma_cache_wback_inv((unsigned long)dp, sizeof(*dp)); ctp->chan_ptr->ddma_dbell = 0; - /* Get next descriptor pointer. */ + /* Get next descriptor pointer. */ ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); /* Return something non-zero. */ @@ -742,7 +742,7 @@ u32 au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes) *nbytes = dp->dscr_cmd1; rv = dp->dscr_stat; - /* Get next descriptor pointer. */ + /* Get next descriptor pointer. */ ctp->get_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); /* Return something non-zero. */ @@ -891,7 +891,7 @@ void au1xxx_dbdma_dump(u32 chanid) chan_tab_t *ctp; au1x_ddma_desc_t *dp; dbdev_tab_t *stp, *dtp; - au1x_dma_chan_t *cp; + au1x_dma_chan_t *cp; u32 i = 0; ctp = *((chan_tab_t **)chanid); @@ -969,7 +969,7 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr) dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V; ctp->chan_ptr->ddma_dbell = 0; - /* Get next descriptor pointer. */ + /* Get next descriptor pointer. */ ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr)); /* Return something non-zero. */ diff --git a/arch/mips/alchemy/common/gpiolib.c b/arch/mips/alchemy/common/gpiolib.c index f1b50f0c01db..f9bc4f520440 100644 --- a/arch/mips/alchemy/common/gpiolib.c +++ b/arch/mips/alchemy/common/gpiolib.c @@ -106,14 +106,14 @@ struct gpio_chip alchemy_gpio_chip[] = { .ngpio = ALCHEMY_GPIO1_NUM, }, [1] = { - .label = "alchemy-gpio2", - .direction_input = gpio2_direction_input, - .direction_output = gpio2_direction_output, - .get = gpio2_get, - .set = gpio2_set, + .label = "alchemy-gpio2", + .direction_input = gpio2_direction_input, + .direction_output = gpio2_direction_output, + .get = gpio2_get, + .set = gpio2_set, .to_irq = gpio2_to_irq, - .base = ALCHEMY_GPIO2_BASE, - .ngpio = ALCHEMY_GPIO2_NUM, + .base = ALCHEMY_GPIO2_BASE, + .ngpio = ALCHEMY_GPIO2_NUM, }, }; diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c index 94fbcd19eb9c..63a71817a00c 100644 --- a/arch/mips/alchemy/common/irq.c +++ b/arch/mips/alchemy/common/irq.c @@ -84,20 +84,20 @@ static int au1300_gpic_settype(struct irq_data *d, unsigned int type); * needs the highest priority. */ struct alchemy_irqmap au1000_irqmap[] __initdata = { - { AU1000_UART0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_UART1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_UART2_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_UART3_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_SSI0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_SSI1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_DMA_INT_BASE, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_DMA_INT_BASE+1, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_DMA_INT_BASE+2, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_DMA_INT_BASE+3, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_DMA_INT_BASE+4, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_DMA_INT_BASE+5, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_DMA_INT_BASE+6, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_DMA_INT_BASE+7, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_UART0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_UART1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_UART2_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_UART3_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_SSI0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_SSI1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_DMA_INT_BASE, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_DMA_INT_BASE+1, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_DMA_INT_BASE+2, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_DMA_INT_BASE+3, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_DMA_INT_BASE+4, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_DMA_INT_BASE+5, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_DMA_INT_BASE+6, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_DMA_INT_BASE+7, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, { AU1000_TOY_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1000_TOY_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1000_TOY_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, @@ -106,33 +106,33 @@ struct alchemy_irqmap au1000_irqmap[] __initdata = { { AU1000_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1000_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1000_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 0, 0 }, - { AU1000_IRDA_TX_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_IRDA_RX_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 0, 0 }, + { AU1000_IRDA_TX_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_IRDA_RX_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 0, 0 }, { AU1000_USB_DEV_SUS_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, - { AU1000_USB_HOST_INT, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1000_USB_HOST_INT, IRQ_TYPE_LEVEL_LOW, 1, 0 }, { AU1000_ACSYNC_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, - { AU1000_MAC0_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1000_MAC1_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_MAC0_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1000_MAC1_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, { AU1000_AC97C_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { -1, }, }; struct alchemy_irqmap au1500_irqmap[] __initdata = { - { AU1500_UART0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1500_PCI_INTA, IRQ_TYPE_LEVEL_LOW, 1, 0 }, - { AU1500_PCI_INTB, IRQ_TYPE_LEVEL_LOW, 1, 0 }, - { AU1500_UART3_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1500_PCI_INTC, IRQ_TYPE_LEVEL_LOW, 1, 0 }, - { AU1500_PCI_INTD, IRQ_TYPE_LEVEL_LOW, 1, 0 }, - { AU1500_DMA_INT_BASE, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1500_DMA_INT_BASE+1, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1500_DMA_INT_BASE+2, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1500_DMA_INT_BASE+3, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1500_DMA_INT_BASE+4, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1500_DMA_INT_BASE+5, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1500_DMA_INT_BASE+6, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1500_DMA_INT_BASE+7, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_UART0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_PCI_INTA, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1500_PCI_INTB, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1500_UART3_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_PCI_INTC, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1500_PCI_INTD, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1500_DMA_INT_BASE, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_DMA_INT_BASE+1, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_DMA_INT_BASE+2, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_DMA_INT_BASE+3, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_DMA_INT_BASE+4, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_DMA_INT_BASE+5, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_DMA_INT_BASE+6, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_DMA_INT_BASE+7, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, { AU1500_TOY_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1500_TOY_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1500_TOY_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, @@ -141,31 +141,31 @@ struct alchemy_irqmap au1500_irqmap[] __initdata = { { AU1500_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1500_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1500_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 0, 0 }, - { AU1500_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 0, 0 }, + { AU1500_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 0, 0 }, { AU1500_USB_DEV_SUS_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, - { AU1500_USB_HOST_INT, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1500_USB_HOST_INT, IRQ_TYPE_LEVEL_LOW, 1, 0 }, { AU1500_ACSYNC_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, - { AU1500_MAC0_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1500_MAC1_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_MAC0_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1500_MAC1_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, { AU1500_AC97C_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { -1, }, }; struct alchemy_irqmap au1100_irqmap[] __initdata = { - { AU1100_UART0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_UART1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_SD_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_UART3_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_SSI0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_SSI1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_DMA_INT_BASE, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_DMA_INT_BASE+1, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_DMA_INT_BASE+2, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_DMA_INT_BASE+3, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_DMA_INT_BASE+4, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_DMA_INT_BASE+5, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_DMA_INT_BASE+6, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_DMA_INT_BASE+7, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_UART0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_UART1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_SD_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_UART3_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_SSI0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_SSI1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_DMA_INT_BASE, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_DMA_INT_BASE+1, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_DMA_INT_BASE+2, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_DMA_INT_BASE+3, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_DMA_INT_BASE+4, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_DMA_INT_BASE+5, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_DMA_INT_BASE+6, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_DMA_INT_BASE+7, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, { AU1100_TOY_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1100_TOY_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1100_TOY_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, @@ -174,33 +174,33 @@ struct alchemy_irqmap au1100_irqmap[] __initdata = { { AU1100_RTC_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1100_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1100_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 0, 0 }, - { AU1100_IRDA_TX_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_IRDA_RX_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 0, 0 }, + { AU1100_IRDA_TX_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_IRDA_RX_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 0, 0 }, { AU1100_USB_DEV_SUS_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, - { AU1100_USB_HOST_INT, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1100_USB_HOST_INT, IRQ_TYPE_LEVEL_LOW, 1, 0 }, { AU1100_ACSYNC_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, - { AU1100_MAC0_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1100_LCD_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_MAC0_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1100_LCD_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, { AU1100_AC97C_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { -1, }, }; struct alchemy_irqmap au1550_irqmap[] __initdata = { - { AU1550_UART0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1550_PCI_INTA, IRQ_TYPE_LEVEL_LOW, 1, 0 }, - { AU1550_PCI_INTB, IRQ_TYPE_LEVEL_LOW, 1, 0 }, - { AU1550_DDMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1550_CRYPTO_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1550_PCI_INTC, IRQ_TYPE_LEVEL_LOW, 1, 0 }, - { AU1550_PCI_INTD, IRQ_TYPE_LEVEL_LOW, 1, 0 }, - { AU1550_PCI_RST_INT, IRQ_TYPE_LEVEL_LOW, 1, 0 }, - { AU1550_UART1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1550_UART3_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1550_PSC0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1550_PSC1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1550_PSC2_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1550_PSC3_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1550_UART0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1550_PCI_INTA, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1550_PCI_INTB, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1550_DDMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1550_CRYPTO_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1550_PCI_INTC, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1550_PCI_INTD, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1550_PCI_RST_INT, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1550_UART1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1550_UART3_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1550_PSC0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1550_PSC1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1550_PSC2_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1550_PSC3_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, { AU1550_TOY_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1550_TOY_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1550_TOY_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, @@ -210,26 +210,26 @@ struct alchemy_irqmap au1550_irqmap[] __initdata = { { AU1550_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1550_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 0, 0 }, { AU1550_NAND_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, - { AU1550_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 0, 0 }, + { AU1550_USB_DEV_REQ_INT, IRQ_TYPE_LEVEL_HIGH, 0, 0 }, { AU1550_USB_DEV_SUS_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, - { AU1550_USB_HOST_INT, IRQ_TYPE_LEVEL_LOW, 1, 0 }, - { AU1550_MAC0_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1550_MAC1_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1550_USB_HOST_INT, IRQ_TYPE_LEVEL_LOW, 1, 0 }, + { AU1550_MAC0_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1550_MAC1_DMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, { -1, }, }; struct alchemy_irqmap au1200_irqmap[] __initdata = { - { AU1200_UART0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_UART0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, { AU1200_SWT_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, - { AU1200_SD_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1200_DDMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1200_MAE_BE_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1200_UART1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1200_MAE_FE_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1200_PSC0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1200_PSC1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1200_AES_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1200_CAMERA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_SD_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_DDMA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_MAE_BE_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_UART1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_MAE_FE_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_PSC0_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_PSC1_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_AES_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_CAMERA_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, { AU1200_TOY_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1200_TOY_MATCH0_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1200_TOY_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, @@ -239,9 +239,9 @@ struct alchemy_irqmap au1200_irqmap[] __initdata = { { AU1200_RTC_MATCH1_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, { AU1200_RTC_MATCH2_INT, IRQ_TYPE_EDGE_RISING, 0, 0 }, { AU1200_NAND_INT, IRQ_TYPE_EDGE_RISING, 1, 0 }, - { AU1200_USB_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1200_LCD_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, - { AU1200_MAE_BOTH_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_USB_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_LCD_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, + { AU1200_MAE_BOTH_INT, IRQ_TYPE_LEVEL_HIGH, 1, 0 }, { -1, }, }; diff --git a/arch/mips/alchemy/common/platform.c b/arch/mips/alchemy/common/platform.c index 7af941d8e717..9837a134a6d6 100644 --- a/arch/mips/alchemy/common/platform.c +++ b/arch/mips/alchemy/common/platform.c @@ -53,7 +53,7 @@ static void alchemy_8250_pm(struct uart_port *port, unsigned int state, .irq = _irq, \ .regshift = 2, \ .iotype = UPIO_AU, \ - .flags = UPF_SKIP_TEST | UPF_IOREMAP | \ + .flags = UPF_SKIP_TEST | UPF_IOREMAP | \ UPF_FIXED_TYPE, \ .type = PORT_16550A, \ .pm = alchemy_8250_pm, \ @@ -137,7 +137,7 @@ static void alchemy_ehci_power_off(struct platform_device *pdev) } static struct usb_ehci_pdata alchemy_ehci_pdata = { - .no_io_watchdog = 1, + .no_io_watchdog = 1, .power_on = alchemy_ehci_power_on, .power_off = alchemy_ehci_power_off, .power_suspend = alchemy_ehci_power_off, diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c index 37ffd997c616..62b4e7bbeab9 100644 --- a/arch/mips/alchemy/common/setup.c +++ b/arch/mips/alchemy/common/setup.c @@ -59,7 +59,7 @@ void __init plat_mem_setup(void) /* Clear to obtain best system bus performance */ clear_c0_config(1 << 19); /* Clear Config[OD] */ - board_setup(); /* board specific setup */ + board_setup(); /* board specific setup */ /* IO/MEM resources. */ set_io_port_base(0); diff --git a/arch/mips/alchemy/common/sleeper.S b/arch/mips/alchemy/common/sleeper.S index c7bcc7e5c822..706d933e0085 100644 --- a/arch/mips/alchemy/common/sleeper.S +++ b/arch/mips/alchemy/common/sleeper.S @@ -102,12 +102,12 @@ LEAF(alchemy_sleep_au1000) cache 0x14, 96(t0) .set mips0 -1: lui a0, 0xb400 /* mem_xxx */ - sw zero, 0x001c(a0) /* Precharge */ +1: lui a0, 0xb400 /* mem_xxx */ + sw zero, 0x001c(a0) /* Precharge */ sync sw zero, 0x0020(a0) /* Auto Refresh */ sync - sw zero, 0x0030(a0) /* Sleep */ + sw zero, 0x0030(a0) /* Sleep */ sync DO_SLEEP @@ -128,15 +128,15 @@ LEAF(alchemy_sleep_au1550) cache 0x14, 96(t0) .set mips0 -1: lui a0, 0xb400 /* mem_xxx */ - sw zero, 0x08c0(a0) /* Precharge */ +1: lui a0, 0xb400 /* mem_xxx */ + sw zero, 0x08c0(a0) /* Precharge */ sync sw zero, 0x08d0(a0) /* Self Refresh */ sync /* wait for sdram to enter self-refresh mode */ - lui t0, 0x0100 -2: lw t1, 0x0850(a0) /* mem_sdstat */ + lui t0, 0x0100 +2: lw t1, 0x0850(a0) /* mem_sdstat */ and t2, t1, t0 beq t2, zero, 2b nop @@ -144,9 +144,9 @@ LEAF(alchemy_sleep_au1550) /* disable SDRAM clocks */ lui t0, 0xcfff ori t0, t0, 0xffff - lw t1, 0x0840(a0) /* mem_sdconfiga */ - and t1, t0, t1 /* clear CE[1:0] */ - sw t1, 0x0840(a0) /* mem_sdconfiga */ + lw t1, 0x0840(a0) /* mem_sdconfiga */ + and t1, t0, t1 /* clear CE[1:0] */ + sw t1, 0x0840(a0) /* mem_sdconfiga */ sync DO_SLEEP diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c index b67930d19325..38afb11ba2c4 100644 --- a/arch/mips/alchemy/common/time.c +++ b/arch/mips/alchemy/common/time.c @@ -85,7 +85,7 @@ static struct clock_event_device au1x_rtcmatch2_clockdev = { .name = "rtcmatch2", .features = CLOCK_EVT_FEAT_ONESHOT, .rating = 1500, - .set_next_event = au1x_rtcmatch2_set_next_event, + .set_next_event = au1x_rtcmatch2_set_next_event, .set_mode = au1x_rtcmatch2_set_mode, .cpumask = cpu_all_mask, }; diff --git a/arch/mips/alchemy/common/usb.c b/arch/mips/alchemy/common/usb.c index 936af8359fb2..fcc695626117 100644 --- a/arch/mips/alchemy/common/usb.c +++ b/arch/mips/alchemy/common/usb.c @@ -122,7 +122,7 @@ static inline void __au1300_ohci_control(void __iomem *base, int enable, int id) unsigned long r; if (enable) { - __raw_writel(1, base + USB_DWC_CTRL7); /* start OHCI clock */ + __raw_writel(1, base + USB_DWC_CTRL7); /* start OHCI clock */ wmb(); r = __raw_readl(base + USB_DWC_CTRL3); /* enable OHCI block */ diff --git a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c index f2039ef2c293..c98c9ea3372c 100644 --- a/arch/mips/alchemy/devboards/bcsr.c +++ b/arch/mips/alchemy/devboards/bcsr.c @@ -20,7 +20,7 @@ static struct bcsr_reg { spinlock_t lock; } bcsr_regs[BCSR_CNT]; -static void __iomem *bcsr_virt; /* KSEG1 addr of BCSR base */ +static void __iomem *bcsr_virt; /* KSEG1 addr of BCSR base */ static int bcsr_csc_base; /* linux-irq of first cascaded irq */ void __init bcsr_init(unsigned long bcsr1_phys, unsigned long bcsr2_phys) diff --git a/arch/mips/alchemy/devboards/db1000.c b/arch/mips/alchemy/devboards/db1000.c index 8187845650f7..11f3ad20321c 100644 --- a/arch/mips/alchemy/devboards/db1000.c +++ b/arch/mips/alchemy/devboards/db1000.c @@ -276,7 +276,7 @@ static void db1100_mmcled_set(struct led_classdev *led, enum led_brightness b) } static struct led_classdev db1100_mmc_led = { - .brightness_set = db1100_mmcled_set, + .brightness_set = db1100_mmcled_set, }; static int db1100_mmc1_card_readonly(void *mmc_host) @@ -314,7 +314,7 @@ static void db1100_mmc1led_set(struct led_classdev *led, enum led_brightness b) } static struct led_classdev db1100_mmc1_led = { - .brightness_set = db1100_mmc1led_set, + .brightness_set = db1100_mmc1led_set, }; static struct au1xmmc_platform_data db1100_mmc_platdata[2] = { @@ -357,7 +357,7 @@ static struct resource au1100_mmc0_resources[] = { } }; -static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); +static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); static struct platform_device db1100_mmc0_dev = { .name = "au1xxx-mmc", @@ -482,7 +482,7 @@ static struct spi_board_info db1100_spi_info[] __initdata = { .mode = 0, .irq = AU1100_GPIO21_INT, .platform_data = &db1100_touch_pd, - .controller_data = (void *)210, /* for spi_gpio: CS# GPIO210 */ + .controller_data = (void *)210, /* for spi_gpio: CS# GPIO210 */ }, }; @@ -572,7 +572,7 @@ static int __init db1000_dev_init(void) irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_LOW); irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW); /* EPSON S1D13806 0x1b000000 - * SRAM 1MB/2MB 0x1a000000 + * SRAM 1MB/2MB 0x1a000000 * DS1693 RTC 0x0c000000 */ } else if (board == BCSR_WHOAMI_PB1100) { @@ -586,7 +586,7 @@ static int __init db1000_dev_init(void) irq_set_irq_type(AU1100_GPIO12_INT, IRQ_TYPE_LEVEL_LOW); irq_set_irq_type(AU1100_GPIO13_INT, IRQ_TYPE_LEVEL_LOW); /* EPSON S1D13806 0x1b000000 - * SRAM 1MB/2MB 0x1a000000 + * SRAM 1MB/2MB 0x1a000000 * DiskOnChip 0x0d000000 * DS1693 RTC 0x0c000000 */ @@ -605,7 +605,7 @@ static int __init db1000_dev_init(void) AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, AU1000_PCMCIA_IO_PHYS_ADDR, AU1000_PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, - c0, d0, /*s0*/0, 0, 0); + c0, d0, /*s0*/0, 0, 0); if (twosocks) { irq_set_irq_type(d1, IRQ_TYPE_EDGE_BOTH); @@ -619,7 +619,7 @@ static int __init db1000_dev_init(void) AU1000_PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1, AU1000_PCMCIA_IO_PHYS_ADDR + 0x004000000, AU1000_PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, - c1, d1, /*s1*/0, 0, 1); + c1, d1, /*s1*/0, 0, 1); } platform_add_devices(db1x00_devs, ARRAY_SIZE(db1x00_devs)); diff --git a/arch/mips/alchemy/devboards/db1200.c b/arch/mips/alchemy/devboards/db1200.c index 299b7d202bea..a84d98b8f96e 100644 --- a/arch/mips/alchemy/devboards/db1200.c +++ b/arch/mips/alchemy/devboards/db1200.c @@ -90,14 +90,14 @@ int __init db1200_board_setup(void) whoami = bcsr_read(BCSR_WHOAMI); printk(KERN_INFO "Alchemy/AMD/RMI %s Board, CPLD Rev %d" - " Board-ID %d Daughtercard ID %d\n", get_system_type(), + " Board-ID %d Daughtercard ID %d\n", get_system_type(), (whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf); /* SMBus/SPI on PSC0, Audio on PSC1 */ pfc = __raw_readl((void __iomem *)SYS_PINFUNC); pfc &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B); pfc &= ~(SYS_PINFUNC_P1A | SYS_PINFUNC_P1B | SYS_PINFUNC_FS3); - pfc |= SYS_PINFUNC_P1C; /* SPI is configured later */ + pfc |= SYS_PINFUNC_P1C; /* SPI is configured later */ __raw_writel(pfc, (void __iomem *)SYS_PINFUNC); wmb(); @@ -129,7 +129,7 @@ int __init db1200_board_setup(void) static struct mtd_partition db1200_spiflash_parts[] = { { .name = "spi_flash", - .offset = 0, + .offset = 0, .size = MTDPART_SIZ_FULL, }, }; @@ -200,12 +200,12 @@ static int au1200_nand_device_ready(struct mtd_info *mtd) static struct mtd_partition db1200_nand_parts[] = { { .name = "NAND FS 0", - .offset = 0, + .offset = 0, .size = 8 * 1024 * 1024, }, { .name = "NAND FS 1", - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL }, }; @@ -395,7 +395,7 @@ static void db1200_mmcled_set(struct led_classdev *led, } static struct led_classdev db1200_mmc_led = { - .brightness_set = db1200_mmcled_set, + .brightness_set = db1200_mmcled_set, }; /* -- */ @@ -463,7 +463,7 @@ static void pb1200_mmc1led_set(struct led_classdev *led, } static struct led_classdev pb1200_mmc1_led = { - .brightness_set = pb1200_mmc1led_set, + .brightness_set = pb1200_mmc1led_set, }; static void pb1200_mmc1_set_power(void *mmc_host, int state) @@ -526,7 +526,7 @@ static struct resource au1200_mmc0_resources[] = { } }; -static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); +static u64 au1xxx_mmc_dmamask = DMA_BIT_MASK(32); static struct platform_device db1200_mmc0_dev = { .name = "au1xxx-mmc", @@ -601,7 +601,7 @@ static int db1200fb_panel_shutdown(void) static struct au1200fb_platdata db1200fb_pd = { .panel_index = db1200fb_panel_index, .panel_init = db1200fb_panel_init, - .panel_shutdown = db1200fb_panel_shutdown, + .panel_shutdown = db1200fb_panel_shutdown, }; static struct resource au1200_lcd_res[] = { @@ -772,11 +772,11 @@ static int __init pb1200_res_fixup(void) } db1200_nand_res[0].start = PB1200_NAND_PHYS_ADDR; - db1200_nand_res[0].end = PB1200_NAND_PHYS_ADDR + 0xff; + db1200_nand_res[0].end = PB1200_NAND_PHYS_ADDR + 0xff; db1200_ide_res[0].start = PB1200_IDE_PHYS_ADDR; - db1200_ide_res[0].end = PB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1; + db1200_ide_res[0].end = PB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1; db1200_eth_res[0].start = PB1200_ETH_PHYS_ADDR; - db1200_eth_res[0].end = PB1200_ETH_PHYS_ADDR + 0xff; + db1200_eth_res[0].end = PB1200_ETH_PHYS_ADDR + 0xff; return 0; } @@ -797,7 +797,7 @@ int __init db1200_dev_setup(void) irq_set_irq_type(AU1200_GPIO7_INT, IRQ_TYPE_LEVEL_LOW); bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT); - /* insert/eject pairs: one of both is always screaming. To avoid + /* insert/eject pairs: one of both is always screaming. To avoid * issues they must not be automatically enabled when initially * requested. */ @@ -813,7 +813,7 @@ int __init db1200_dev_setup(void) spi_register_board_info(db1200_spi_devs, ARRAY_SIZE(db1200_i2c_devs)); - /* SWITCHES: S6.8 I2C/SPI selector (OFF=I2C ON=SPI) + /* SWITCHES: S6.8 I2C/SPI selector (OFF=I2C ON=SPI) * S6.7 AC97/I2S selector (OFF=AC97 ON=I2S) * or S12 on the PB1200. */ diff --git a/arch/mips/alchemy/devboards/db1300.c b/arch/mips/alchemy/devboards/db1300.c index cdf37cbd3d1f..6167e73eef9c 100644 --- a/arch/mips/alchemy/devboards/db1300.c +++ b/arch/mips/alchemy/devboards/db1300.c @@ -80,7 +80,7 @@ static int db1300_dev_pins[] __initdata = { AU1300_PIN_PSC0D1, AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0, AU1300_PIN_PSC1D1, - AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0, + AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0, AU1300_PIN_PSC2D1, AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0, AU1300_PIN_PSC3D1, @@ -143,12 +143,12 @@ static int au1300_nand_device_ready(struct mtd_info *mtd) static struct mtd_partition db1300_nand_parts[] = { { .name = "NAND FS 0", - .offset = 0, + .offset = 0, .size = 8 * 1024 * 1024, }, { .name = "NAND FS 1", - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL }, }; @@ -487,7 +487,7 @@ static void db1300_mmcled_set(struct led_classdev *led, } static struct led_classdev db1300_mmc_led = { - .brightness_set = db1300_mmcled_set, + .brightness_set = db1300_mmcled_set, }; struct au1xmmc_platform_data db1300_sd1_platdata = { @@ -646,7 +646,7 @@ static int db1300fb_panel_shutdown(void) static struct au1200fb_platdata db1300fb_pd = { .panel_index = db1300fb_panel_index, .panel_init = db1300fb_panel_init, - .panel_shutdown = db1300fb_panel_shutdown, + .panel_shutdown = db1300fb_panel_shutdown, }; static struct resource au1300_lcd_res[] = { diff --git a/arch/mips/alchemy/devboards/db1550.c b/arch/mips/alchemy/devboards/db1550.c index 5a9ae6095428..016cddacd7ea 100644 --- a/arch/mips/alchemy/devboards/db1550.c +++ b/arch/mips/alchemy/devboards/db1550.c @@ -67,7 +67,7 @@ int __init db1550_board_setup(void) bcsr_init(PB1550_BCSR_PHYS_ADDR, PB1550_BCSR_PHYS_ADDR + PB1550_BCSR_HEXLED_OFS); - pr_info("Alchemy/AMD %s Board, CPLD Rev %d Board-ID %d " \ + pr_info("Alchemy/AMD %s Board, CPLD Rev %d Board-ID %d " \ "Daughtercard ID %d\n", get_system_type(), (whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf); @@ -80,7 +80,7 @@ int __init db1550_board_setup(void) static struct mtd_partition db1550_spiflash_parts[] = { { .name = "spi_flash", - .offset = 0, + .offset = 0, .size = MTDPART_SIZ_FULL, }, }; @@ -151,12 +151,12 @@ static int au1550_nand_device_ready(struct mtd_info *mtd) static struct mtd_partition db1550_nand_parts[] = { { .name = "NAND FS 0", - .offset = 0, + .offset = 0, .size = 8 * 1024 * 1024, }, { .name = "NAND FS 1", - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, .size = MTDPART_SIZ_FULL }, }; @@ -495,10 +495,10 @@ static void __init db1550_devices(void) { alchemy_gpio_direction_output(203, 0); /* red led on */ - irq_set_irq_type(AU1550_GPIO0_INT, IRQ_TYPE_EDGE_BOTH); /* CD0# */ - irq_set_irq_type(AU1550_GPIO1_INT, IRQ_TYPE_EDGE_BOTH); /* CD1# */ - irq_set_irq_type(AU1550_GPIO3_INT, IRQ_TYPE_LEVEL_LOW); /* CARD0# */ - irq_set_irq_type(AU1550_GPIO5_INT, IRQ_TYPE_LEVEL_LOW); /* CARD1# */ + irq_set_irq_type(AU1550_GPIO0_INT, IRQ_TYPE_EDGE_BOTH); /* CD0# */ + irq_set_irq_type(AU1550_GPIO1_INT, IRQ_TYPE_EDGE_BOTH); /* CD1# */ + irq_set_irq_type(AU1550_GPIO3_INT, IRQ_TYPE_LEVEL_LOW); /* CARD0# */ + irq_set_irq_type(AU1550_GPIO5_INT, IRQ_TYPE_LEVEL_LOW); /* CARD1# */ irq_set_irq_type(AU1550_GPIO21_INT, IRQ_TYPE_LEVEL_LOW); /* STSCHG0# */ irq_set_irq_type(AU1550_GPIO22_INT, IRQ_TYPE_LEVEL_LOW); /* STSCHG1# */ @@ -539,7 +539,7 @@ static void __init pb1550_devices(void) /* Pb1550, like all others, also has statuschange irqs; however they're * wired up on one of the Au1550's shared GPIO201_205 line, which also - * services the PCMCIA card interrupts. So we ignore statuschange and + * services the PCMCIA card interrupts. So we ignore statuschange and * use the GPIO201_205 exclusively for card interrupts, since a) pcmcia * drivers are used to shared irqs and b) statuschange isn't really use- * ful anyway. diff --git a/arch/mips/alchemy/devboards/pm.c b/arch/mips/alchemy/devboards/pm.c index acaf91b5e461..b86bff31d1d3 100644 --- a/arch/mips/alchemy/devboards/pm.c +++ b/arch/mips/alchemy/devboards/pm.c @@ -194,7 +194,7 @@ static ssize_t db1x_pmattr_store(struct kobject *kobj, } #define ATTR(x) \ - static struct kobj_attribute x##_attribute = \ + static struct kobj_attribute x##_attribute = \ __ATTR(x, 0664, db1x_pmattr_show, \ db1x_pmattr_store); |