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Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw')
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h2
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h6
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h2
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h14
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h2
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h2
6 files changed, 5 insertions, 23 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h
index 90dbe26bf954..a17e5de3b100 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h
@@ -91,9 +91,7 @@ struct clk_limit_table_entry {
unsigned int dispclk_mhz;
unsigned int dppclk_mhz;
unsigned int phyclk_mhz;
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
unsigned int wck_ratio;
-#endif
};
/* This table is contiguous */
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h
index fc11f8e1ab59..0afa2364a986 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h
@@ -29,7 +29,6 @@
#include "dc_types.h"
#include "hw_shared.h"
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
enum phyd32clk_clock_source {
PHYD32CLKA,
PHYD32CLKB,
@@ -55,18 +54,15 @@ enum dentist_dispclk_change_mode {
DISPCLK_CHANGE_MODE_IMMEDIATE,
DISPCLK_CHANGE_MODE_RAMPING,
};
-#endif
struct dccg {
struct dc_context *ctx;
const struct dccg_funcs *funcs;
int pipe_dppclk_khz[MAX_PIPES];
int ref_dppclk;
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
int dtbclk_khz[MAX_PIPES];
int audio_dtbclk_khz;
int ref_dtbclk_khz;
-#endif
};
struct dccg_funcs {
@@ -83,7 +79,6 @@ struct dccg_funcs {
void (*otg_drop_pixel)(struct dccg *dccg,
uint32_t otg_inst);
void (*dccg_init)(struct dccg *dccg);
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
void (*set_physymclk)(
struct dccg *dccg,
@@ -105,7 +100,6 @@ struct dccg_funcs {
void (*set_dispclk_change_mode)(
struct dccg *dccg,
enum dentist_dispclk_change_mode change_mode);
-#endif
};
#endif //__DAL_DCCG_H__
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
index d2611b865695..0638b337f143 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
@@ -152,11 +152,9 @@ struct hubbub_funcs {
void (*force_pstate_change_control)(struct hubbub *hubbub, bool force, bool allow);
void (*init_watermarks)(struct hubbub *hubbub);
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
void (*program_det_size)(struct hubbub *hubbub, int hubp_inst, unsigned det_buffer_size_in_kbyte);
void (*program_compbuf_size)(struct hubbub *hubbub, unsigned compbuf_size_kb, bool safe_to_increase);
void (*init_crb)(struct hubbub *hubbub);
-#endif
};
struct hubbub {
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
index f643fe3ed064..9eaf345aa2a1 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h
@@ -127,13 +127,11 @@ struct link_enc_state {
};
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
- enum encoder_type_select {
- ENCODER_TYPE_DIG = 0,
- ENCODER_TYPE_HDMI_FRL = 1,
- ENCODER_TYPE_DP_128B132B = 2
- };
-#endif
+enum encoder_type_select {
+ ENCODER_TYPE_DIG = 0,
+ ENCODER_TYPE_HDMI_FRL = 1,
+ ENCODER_TYPE_DP_128B132B = 2
+};
struct link_encoder_funcs {
void (*read_state)(
@@ -193,12 +191,10 @@ struct link_encoder_funcs {
enum signal_type (*get_dig_mode)(
struct link_encoder *enc);
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
void (*set_dio_phy_mux)(
struct link_encoder *enc,
enum encoder_type_select sel,
uint32_t hpo_inst);
-#endif
};
/*
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h b/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
index dd562dcd03b2..8798cfa11a4d 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
@@ -33,10 +33,8 @@
struct dchub_init_data;
struct cstate_pstate_watermarks_st {
uint32_t cstate_exit_ns;
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
uint32_t cstate_exit_z8_ns;
uint32_t cstate_enter_plus_exit_z8_ns;
-#endif
uint32_t cstate_enter_plus_exit_ns;
uint32_t pstate_change_ns;
};
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
index 8f06e273e703..03f47f23fb65 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/timing_generator.h
@@ -173,9 +173,7 @@ struct timing_generator_funcs {
bool (*enable_crtc)(struct timing_generator *tg);
bool (*disable_crtc)(struct timing_generator *tg);
-#if defined(CONFIG_DRM_AMD_DC_DCN3_1)
bool (*immediate_disable_crtc)(struct timing_generator *tg);
-#endif
bool (*is_counter_moving)(struct timing_generator *tg);
void (*get_position)(struct timing_generator *tg,
struct crtc_position *position);