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-rw-r--r--drivers/gpu/drm/amd/display/dmub/dmub_srv.h8
-rw-r--r--drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h14
-rw-r--r--drivers/gpu/drm/amd/display/dmub/src/Makefile6
-rw-r--r--drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c4
4 files changed, 2 insertions, 30 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
index 2bf5e7207744..abbf7ae584c9 100644
--- a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
+++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h
@@ -73,9 +73,7 @@ extern "C" {
/* Forward declarations */
struct dmub_srv;
struct dmub_srv_common_regs;
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
struct dmub_srv_dcn31_regs;
-#endif
struct dmcub_trace_buf_entry;
@@ -97,9 +95,7 @@ enum dmub_asic {
DMUB_ASIC_DCN301,
DMUB_ASIC_DCN302,
DMUB_ASIC_DCN303,
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
DMUB_ASIC_DCN31,
-#endif
DMUB_ASIC_MAX,
};
@@ -238,9 +234,7 @@ struct dmub_srv_hw_params {
uint32_t psp_version;
bool load_inst_const;
bool skip_panel_power_sequence;
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
bool disable_z10;
-#endif
};
/**
@@ -400,9 +394,7 @@ struct dmub_srv {
/* private: internal use only */
const struct dmub_srv_common_regs *regs;
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
const struct dmub_srv_dcn31_regs *regs_dcn31;
-#endif
struct dmub_srv_base_funcs funcs;
struct dmub_srv_hw_funcs hw_funcs;
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 707c7d0e370a..7c4734f905d9 100644
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -362,11 +362,7 @@ union dmub_fw_boot_options {
uint32_t skip_phy_access : 1; /**< 1 if PHY access should be skipped */
uint32_t disable_clk_gate: 1; /**< 1 if clock gating should be disabled */
uint32_t skip_phy_init_panel_sequence: 1; /**< 1 to skip panel init seq */
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
uint32_t z10_disable: 1; /**< 1 to disable z10 */
-#else
- uint32_t reserved_unreleased: 1; /**< reserved for an unreleased feature */
-#endif
uint32_t reserved : 25; /**< reserved */
} bits; /**< boot bits */
uint32_t all; /**< 32-bit access to bits */
@@ -631,7 +627,6 @@ enum dmub_cmd_type {
* Command type used for OUTBOX1 notification enable
*/
DMUB_CMD__OUTBOX1_ENABLE = 71,
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
/**
* Command type used for all idle optimization commands.
*/
@@ -644,7 +639,6 @@ enum dmub_cmd_type {
* Command type used for all panel control commands.
*/
DMUB_CMD__PANEL_CNTL = 74,
-#endif
/**
* Command type used for EDID CEA parsing
*/
@@ -854,8 +848,6 @@ struct dmub_rb_cmd_mall {
uint8_t reserved2; /**< Reserved bits */
};
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
-
/**
* enum dmub_cmd_idle_opt_type - Idle optimization command type.
*/
@@ -900,7 +892,7 @@ struct dmub_rb_cmd_clk_mgr_notify_clocks {
struct dmub_cmd_header header; /**< header */
struct dmub_clocks clocks; /**< clock data */
};
-#endif
+
/**
* struct dmub_cmd_digx_encoder_control_data - Encoder control data.
*/
@@ -2111,7 +2103,6 @@ struct dmub_rb_cmd_drr_update {
struct dmub_optc_state dmub_optc_state_req;
};
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
/**
* enum dmub_cmd_panel_cntl_type - Panel control command.
*/
@@ -2146,7 +2137,6 @@ struct dmub_rb_cmd_panel_cntl {
struct dmub_cmd_header header; /**< header */
struct dmub_cmd_panel_cntl_data data; /**< payload */
};
-#endif
/**
* Data passed from driver to FW in a DMUB_CMD__VBIOS_LVTMA_CONTROL command.
@@ -2307,7 +2297,6 @@ union dmub_rb_cmd {
* Definition of a DMUB_CMD__MALL command.
*/
struct dmub_rb_cmd_mall mall;
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
/**
* Definition of a DMUB_CMD__IDLE_OPT_DCN_RESTORE command.
*/
@@ -2322,7 +2311,6 @@ union dmub_rb_cmd {
* Definition of DMUB_CMD__PANEL_CNTL commands.
*/
struct dmub_rb_cmd_panel_cntl panel_cntl;
-#endif
/**
* Definition of a DMUB_CMD__ABM_SET_PIPE command.
*/
diff --git a/drivers/gpu/drm/amd/display/dmub/src/Makefile b/drivers/gpu/drm/amd/display/dmub/src/Makefile
index 80b9fe225208..0495bcdd3463 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/Makefile
+++ b/drivers/gpu/drm/amd/display/dmub/src/Makefile
@@ -21,12 +21,8 @@
#
DMUB = dmub_srv.o dmub_srv_stat.o dmub_reg.o dmub_dcn20.o dmub_dcn21.o
-DMUB += dmub_dcn30.o dmub_dcn301.o
-DMUB += dmub_dcn302.o
-DMUB += dmub_dcn303.o
-ifdef CONFIG_DRM_AMD_DC_DCN3_1
+DMUB += dmub_dcn30.o dmub_dcn301.o dmub_dcn302.o dmub_dcn303.o
DMUB += dmub_dcn31.o
-endif
AMD_DAL_DMUB = $(addprefix $(AMDDALPATH)/dmub/src/,$(DMUB))
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
index a195734b4ddf..fd7e996ab1d7 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
@@ -31,9 +31,7 @@
#include "dmub_dcn301.h"
#include "dmub_dcn302.h"
#include "dmub_dcn303.h"
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
#include "dmub_dcn31.h"
-#endif
#include "os_types.h"
/*
* Note: the DMUB service is standalone. No additional headers should be
@@ -208,7 +206,6 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
funcs->setup_windows = dmub_dcn30_setup_windows;
}
break;
-#ifdef CONFIG_DRM_AMD_DC_DCN3_1
case DMUB_ASIC_DCN31:
funcs->reset = dmub_dcn31_reset;
@@ -241,7 +238,6 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
funcs->get_current_time = dmub_dcn31_get_current_time;
break;
-#endif
default:
return false;