diff options
Diffstat (limited to 'drivers/media/i2c')
25 files changed, 1009 insertions, 809 deletions
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 56f276b920ab..c6d3ee472d81 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -195,6 +195,7 @@ config VIDEO_IMX334 config VIDEO_IMX335 tristate "Sony IMX335 sensor support" depends on OF_GPIO + select V4L2_CCI_I2C help This is a Video4Linux2 sensor driver for the Sony IMX335 camera. @@ -405,6 +406,7 @@ config VIDEO_OV2740 config VIDEO_OV4689 tristate "OmniVision OV4689 sensor support" depends on GPIOLIB + select V4L2_CCI_I2C help This is a Video4Linux2 sensor-level driver for the OmniVision OV4689 camera. diff --git a/drivers/media/i2c/adv7180.c b/drivers/media/i2c/adv7180.c index 4829cbe32419..819ff9f7c90f 100644 --- a/drivers/media/i2c/adv7180.c +++ b/drivers/media/i2c/adv7180.c @@ -1486,7 +1486,7 @@ static int adv7180_probe(struct i2c_client *client) if (ret) goto err_media_entity_cleanup; - if (state->irq) { + if (state->irq > 0) { ret = request_threaded_irq(client->irq, NULL, adv7180_irq, IRQF_ONESHOT | IRQF_TRIGGER_FALLING, KBUILD_MODNAME, state); diff --git a/drivers/media/i2c/adv748x/adv748x-hdmi.c b/drivers/media/i2c/adv748x/adv748x-hdmi.c index ec151dc69c23..a4db9bae5f79 100644 --- a/drivers/media/i2c/adv748x/adv748x-hdmi.c +++ b/drivers/media/i2c/adv748x/adv748x-hdmi.c @@ -214,7 +214,7 @@ static int adv748x_hdmi_set_video_timings(struct adv748x_state *state, * v4l2_subdev_video_ops */ -static int adv748x_hdmi_s_dv_timings(struct v4l2_subdev *sd, +static int adv748x_hdmi_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd); @@ -254,7 +254,7 @@ error: return ret; } -static int adv748x_hdmi_g_dv_timings(struct v4l2_subdev *sd, +static int adv748x_hdmi_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd); @@ -269,7 +269,7 @@ static int adv748x_hdmi_g_dv_timings(struct v4l2_subdev *sd, return 0; } -static int adv748x_hdmi_query_dv_timings(struct v4l2_subdev *sd, +static int adv748x_hdmi_query_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct adv748x_hdmi *hdmi = adv748x_sd_to_hdmi(sd); @@ -392,9 +392,6 @@ static int adv748x_hdmi_g_pixelaspect(struct v4l2_subdev *sd, } static const struct v4l2_subdev_video_ops adv748x_video_ops_hdmi = { - .s_dv_timings = adv748x_hdmi_s_dv_timings, - .g_dv_timings = adv748x_hdmi_g_dv_timings, - .query_dv_timings = adv748x_hdmi_query_dv_timings, .g_input_status = adv748x_hdmi_g_input_status, .s_stream = adv748x_hdmi_s_stream, .g_pixelaspect = adv748x_hdmi_g_pixelaspect, @@ -413,7 +410,7 @@ static int adv748x_hdmi_propagate_pixelrate(struct adv748x_hdmi *hdmi) if (!tx) return -ENOLINK; - adv748x_hdmi_query_dv_timings(&hdmi->sd, &timings); + adv748x_hdmi_query_dv_timings(&hdmi->sd, 0, &timings); return adv748x_csi2_set_pixelrate(tx, timings.bt.pixelclock); } @@ -610,6 +607,9 @@ static const struct v4l2_subdev_pad_ops adv748x_pad_ops_hdmi = { .get_fmt = adv748x_hdmi_get_format, .get_edid = adv748x_hdmi_get_edid, .set_edid = adv748x_hdmi_set_edid, + .s_dv_timings = adv748x_hdmi_s_dv_timings, + .g_dv_timings = adv748x_hdmi_g_dv_timings, + .query_dv_timings = adv748x_hdmi_query_dv_timings, .dv_timings_cap = adv748x_hdmi_dv_timings_cap, .enum_dv_timings = adv748x_hdmi_enum_dv_timings, }; @@ -734,7 +734,7 @@ int adv748x_hdmi_init(struct adv748x_hdmi *hdmi) struct v4l2_dv_timings cea1280x720 = V4L2_DV_BT_CEA_1280X720P30; int ret; - adv748x_hdmi_s_dv_timings(&hdmi->sd, &cea1280x720); + adv748x_hdmi_s_dv_timings(&hdmi->sd, 0, &cea1280x720); /* Initialise a default 16:9 aspect ratio */ hdmi->aspect_ratio.numerator = 16; diff --git a/drivers/media/i2c/adv7511-v4l2.c b/drivers/media/i2c/adv7511-v4l2.c index 0f780eb6ef63..79946e9c7401 100644 --- a/drivers/media/i2c/adv7511-v4l2.c +++ b/drivers/media/i2c/adv7511-v4l2.c @@ -995,8 +995,8 @@ static int adv7511_s_stream(struct v4l2_subdev *sd, int enable) return 0; } -static int adv7511_s_dv_timings(struct v4l2_subdev *sd, - struct v4l2_dv_timings *timings) +static int adv7511_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *timings) { struct adv7511_state *state = get_adv7511_state(sd); struct v4l2_bt_timings *bt = &timings->bt; @@ -1004,6 +1004,9 @@ static int adv7511_s_dv_timings(struct v4l2_subdev *sd, v4l2_dbg(1, debug, sd, "%s:\n", __func__); + if (pad != 0) + return -EINVAL; + /* quick sanity check */ if (!v4l2_valid_dv_timings(timings, &adv7511_timings_cap, NULL, NULL)) return -EINVAL; @@ -1042,13 +1045,16 @@ static int adv7511_s_dv_timings(struct v4l2_subdev *sd, return 0; } -static int adv7511_g_dv_timings(struct v4l2_subdev *sd, +static int adv7511_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct adv7511_state *state = get_adv7511_state(sd); v4l2_dbg(1, debug, sd, "%s:\n", __func__); + if (pad != 0) + return -EINVAL; + if (!timings) return -EINVAL; @@ -1078,8 +1084,6 @@ static int adv7511_dv_timings_cap(struct v4l2_subdev *sd, static const struct v4l2_subdev_video_ops adv7511_video_ops = { .s_stream = adv7511_s_stream, - .s_dv_timings = adv7511_s_dv_timings, - .g_dv_timings = adv7511_g_dv_timings, }; /* ------------------------------ AUDIO OPS ------------------------------ */ @@ -1403,6 +1407,8 @@ static const struct v4l2_subdev_pad_ops adv7511_pad_ops = { .enum_mbus_code = adv7511_enum_mbus_code, .get_fmt = adv7511_get_fmt, .set_fmt = adv7511_set_fmt, + .s_dv_timings = adv7511_s_dv_timings, + .g_dv_timings = adv7511_g_dv_timings, .enum_dv_timings = adv7511_enum_dv_timings, .dv_timings_cap = adv7511_dv_timings_cap, }; diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c index 319db3e847c4..48230d5109f0 100644 --- a/drivers/media/i2c/adv7604.c +++ b/drivers/media/i2c/adv7604.c @@ -1557,8 +1557,8 @@ static unsigned int adv76xx_read_hdmi_pixelclock(struct v4l2_subdev *sd) return freq; } -static int adv76xx_query_dv_timings(struct v4l2_subdev *sd, - struct v4l2_dv_timings *timings) +static int adv76xx_query_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *timings) { struct adv76xx_state *state = to_state(sd); const struct adv76xx_chip_info *info = state->info; @@ -1687,8 +1687,8 @@ found: return 0; } -static int adv76xx_s_dv_timings(struct v4l2_subdev *sd, - struct v4l2_dv_timings *timings) +static int adv76xx_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *timings) { struct adv76xx_state *state = to_state(sd); struct v4l2_bt_timings *bt; @@ -1730,8 +1730,8 @@ static int adv76xx_s_dv_timings(struct v4l2_subdev *sd, return 0; } -static int adv76xx_g_dv_timings(struct v4l2_subdev *sd, - struct v4l2_dv_timings *timings) +static int adv76xx_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *timings) { struct adv76xx_state *state = to_state(sd); @@ -2607,7 +2607,7 @@ static int adv76xx_log_status(struct v4l2_subdev *sd) stdi.lcf, stdi.bl, stdi.lcvs, stdi.interlaced ? "interlaced" : "progressive", stdi.hs_pol, stdi.vs_pol); - if (adv76xx_query_dv_timings(sd, &timings)) + if (adv76xx_query_dv_timings(sd, 0, &timings)) v4l2_info(sd, "No video detected\n"); else v4l2_print_dv_timings(sd->name, "Detected format: ", @@ -2726,9 +2726,6 @@ static const struct v4l2_subdev_core_ops adv76xx_core_ops = { static const struct v4l2_subdev_video_ops adv76xx_video_ops = { .s_routing = adv76xx_s_routing, .g_input_status = adv76xx_g_input_status, - .s_dv_timings = adv76xx_s_dv_timings, - .g_dv_timings = adv76xx_g_dv_timings, - .query_dv_timings = adv76xx_query_dv_timings, }; static const struct v4l2_subdev_pad_ops adv76xx_pad_ops = { @@ -2738,6 +2735,9 @@ static const struct v4l2_subdev_pad_ops adv76xx_pad_ops = { .set_fmt = adv76xx_set_format, .get_edid = adv76xx_get_edid, .set_edid = adv76xx_set_edid, + .s_dv_timings = adv76xx_s_dv_timings, + .g_dv_timings = adv76xx_g_dv_timings, + .query_dv_timings = adv76xx_query_dv_timings, .dv_timings_cap = adv76xx_dv_timings_cap, .enum_dv_timings = adv76xx_enum_dv_timings, }; diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c index 2ad0f9f5503d..f2d4217310e7 100644 --- a/drivers/media/i2c/adv7842.c +++ b/drivers/media/i2c/adv7842.c @@ -1518,7 +1518,7 @@ static void adv7842_fill_optional_dv_timings_fields(struct v4l2_subdev *sd, timings->bt.flags |= V4L2_DV_FL_CAN_DETECT_REDUCED_FPS; } -static int adv7842_query_dv_timings(struct v4l2_subdev *sd, +static int adv7842_query_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct adv7842_state *state = to_state(sd); @@ -1527,6 +1527,9 @@ static int adv7842_query_dv_timings(struct v4l2_subdev *sd, v4l2_dbg(1, debug, sd, "%s:\n", __func__); + if (pad != 0) + return -EINVAL; + memset(timings, 0, sizeof(struct v4l2_dv_timings)); /* SDP block */ @@ -1643,7 +1646,7 @@ found: return 0; } -static int adv7842_s_dv_timings(struct v4l2_subdev *sd, +static int adv7842_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct adv7842_state *state = to_state(sd); @@ -1652,6 +1655,9 @@ static int adv7842_s_dv_timings(struct v4l2_subdev *sd, v4l2_dbg(1, debug, sd, "%s:\n", __func__); + if (pad != 0) + return -EINVAL; + if (state->mode == ADV7842_MODE_SDP) return -ENODATA; @@ -1689,11 +1695,14 @@ static int adv7842_s_dv_timings(struct v4l2_subdev *sd, return 0; } -static int adv7842_g_dv_timings(struct v4l2_subdev *sd, +static int adv7842_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct adv7842_state *state = to_state(sd); + if (pad != 0) + return -EINVAL; + if (state->mode == ADV7842_MODE_SDP) return -ENODATA; *timings = state->timings; @@ -2780,7 +2789,7 @@ static int adv7842_cp_log_status(struct v4l2_subdev *sd) "interlaced" : "progressive", hs_pol, vs_pol); } - if (adv7842_query_dv_timings(sd, &timings)) + if (adv7842_query_dv_timings(sd, 0, &timings)) v4l2_info(sd, "No video detected\n"); else v4l2_print_dv_timings(sd->name, "Detected format: ", @@ -3226,7 +3235,7 @@ static int adv7842_command_ram_test(struct v4l2_subdev *sd) memset(&state->timings, 0, sizeof(struct v4l2_dv_timings)); - adv7842_s_dv_timings(sd, &timings); + adv7842_s_dv_timings(sd, 0, &timings); return ret; } @@ -3298,9 +3307,6 @@ static const struct v4l2_subdev_video_ops adv7842_video_ops = { .s_routing = adv7842_s_routing, .querystd = adv7842_querystd, .g_input_status = adv7842_g_input_status, - .s_dv_timings = adv7842_s_dv_timings, - .g_dv_timings = adv7842_g_dv_timings, - .query_dv_timings = adv7842_query_dv_timings, }; static const struct v4l2_subdev_pad_ops adv7842_pad_ops = { @@ -3309,6 +3315,9 @@ static const struct v4l2_subdev_pad_ops adv7842_pad_ops = { .set_fmt = adv7842_set_format, .get_edid = adv7842_get_edid, .set_edid = adv7842_set_edid, + .s_dv_timings = adv7842_s_dv_timings, + .g_dv_timings = adv7842_g_dv_timings, + .query_dv_timings = adv7842_query_dv_timings, .enum_dv_timings = adv7842_enum_dv_timings, .dv_timings_cap = adv7842_dv_timings_cap, }; diff --git a/drivers/media/i2c/dw9714.c b/drivers/media/i2c/dw9714.c index 84d29bcf0ccd..0e88ce0ef8d7 100644 --- a/drivers/media/i2c/dw9714.c +++ b/drivers/media/i2c/dw9714.c @@ -310,8 +310,8 @@ module_i2c_driver(dw9714_i2c_driver); MODULE_AUTHOR("Tianshu Qiu <tian.shu.qiu@intel.com>"); MODULE_AUTHOR("Jian Xu Zheng"); -MODULE_AUTHOR("Yuning Pu <yuning.pu@intel.com>"); -MODULE_AUTHOR("Jouni Ukkonen <jouni.ukkonen@intel.com>"); -MODULE_AUTHOR("Tommi Franttila <tommi.franttila@intel.com>"); +MODULE_AUTHOR("Yuning Pu"); +MODULE_AUTHOR("Jouni Ukkonen"); +MODULE_AUTHOR("Tommi Franttila"); MODULE_DESCRIPTION("DW9714 VCM driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/media/i2c/et8ek8/et8ek8_driver.c b/drivers/media/i2c/et8ek8/et8ek8_driver.c index f548b1bb75fb..e932d25ca7b3 100644 --- a/drivers/media/i2c/et8ek8/et8ek8_driver.c +++ b/drivers/media/i2c/et8ek8/et8ek8_driver.c @@ -1475,7 +1475,7 @@ err_mutex: return ret; } -static void __exit et8ek8_remove(struct i2c_client *client) +static void et8ek8_remove(struct i2c_client *client) { struct v4l2_subdev *subdev = i2c_get_clientdata(client); struct et8ek8_sensor *sensor = to_et8ek8_sensor(subdev); @@ -1517,7 +1517,7 @@ static struct i2c_driver et8ek8_i2c_driver = { .of_match_table = et8ek8_of_table, }, .probe = et8ek8_probe, - .remove = __exit_p(et8ek8_remove), + .remove = et8ek8_remove, .id_table = et8ek8_id_table, }; diff --git a/drivers/media/i2c/hi556.c b/drivers/media/i2c/hi556.c index 38c77d515786..b440f386f062 100644 --- a/drivers/media/i2c/hi556.c +++ b/drivers/media/i2c/hi556.c @@ -3,10 +3,13 @@ #include <asm/unaligned.h> #include <linux/acpi.h> +#include <linux/clk.h> #include <linux/delay.h> +#include <linux/gpio/consumer.h> #include <linux/i2c.h> #include <linux/module.h> #include <linux/pm_runtime.h> +#include <linux/regulator/consumer.h> #include <media/v4l2-ctrls.h> #include <media/v4l2-device.h> #include <media/v4l2-fwnode.h> @@ -633,6 +636,11 @@ struct hi556 { struct v4l2_ctrl *hblank; struct v4l2_ctrl *exposure; + /* GPIOs, clocks, etc. */ + struct gpio_desc *reset_gpio; + struct clk *clk; + struct regulator *avdd; + /* Current mode */ const struct hi556_mode *cur_mode; @@ -1206,8 +1214,18 @@ static int hi556_check_hwcfg(struct device *dev) int ret = 0; unsigned int i, j; - if (!fwnode) - return -ENXIO; + /* + * Sometimes the fwnode graph is initialized by the bridge driver, + * wait for this. + */ + ep = fwnode_graph_get_next_endpoint(fwnode, NULL); + if (!ep) + return -EPROBE_DEFER; + + ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); + fwnode_handle_put(ep); + if (ret) + return ret; ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk); if (ret) { @@ -1220,15 +1238,6 @@ static int hi556_check_hwcfg(struct device *dev) return -EINVAL; } - ep = fwnode_graph_get_next_endpoint(fwnode, NULL); - if (!ep) - return -ENXIO; - - ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); - fwnode_handle_put(ep); - if (ret) - return ret; - if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) { dev_err(dev, "number of CSI2 data lanes %d is not supported", bus_cfg.bus.mipi_csi2.num_data_lanes); @@ -1275,6 +1284,47 @@ static void hi556_remove(struct i2c_client *client) mutex_destroy(&hi556->mutex); } +static int hi556_suspend(struct device *dev) +{ + struct v4l2_subdev *sd = dev_get_drvdata(dev); + struct hi556 *hi556 = to_hi556(sd); + int ret; + + gpiod_set_value_cansleep(hi556->reset_gpio, 1); + + ret = regulator_disable(hi556->avdd); + if (ret) { + dev_err(dev, "failed to disable avdd: %d\n", ret); + gpiod_set_value_cansleep(hi556->reset_gpio, 0); + return ret; + } + + clk_disable_unprepare(hi556->clk); + return 0; +} + +static int hi556_resume(struct device *dev) +{ + struct v4l2_subdev *sd = dev_get_drvdata(dev); + struct hi556 *hi556 = to_hi556(sd); + int ret; + + ret = clk_prepare_enable(hi556->clk); + if (ret) + return ret; + + ret = regulator_enable(hi556->avdd); + if (ret) { + dev_err(dev, "failed to enable avdd: %d\n", ret); + clk_disable_unprepare(hi556->clk); + return ret; + } + + gpiod_set_value_cansleep(hi556->reset_gpio, 0); + usleep_range(5000, 5500); + return 0; +} + static int hi556_probe(struct i2c_client *client) { struct hi556 *hi556; @@ -1294,12 +1344,35 @@ static int hi556_probe(struct i2c_client *client) v4l2_i2c_subdev_init(&hi556->sd, client, &hi556_subdev_ops); + hi556->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", + GPIOD_OUT_HIGH); + if (IS_ERR(hi556->reset_gpio)) + return dev_err_probe(&client->dev, PTR_ERR(hi556->reset_gpio), + "failed to get reset GPIO\n"); + + hi556->clk = devm_clk_get_optional(&client->dev, "clk"); + if (IS_ERR(hi556->clk)) + return dev_err_probe(&client->dev, PTR_ERR(hi556->clk), + "failed to get clock\n"); + + /* The regulator core will provide a "dummy" regulator if necessary */ + hi556->avdd = devm_regulator_get(&client->dev, "avdd"); + if (IS_ERR(hi556->avdd)) + return dev_err_probe(&client->dev, PTR_ERR(hi556->avdd), + "failed to get avdd regulator\n"); + full_power = acpi_dev_state_d0(&client->dev); if (full_power) { + /* Ensure non ACPI managed resources are enabled */ + ret = hi556_resume(&client->dev); + if (ret) + return dev_err_probe(&client->dev, ret, + "failed to power on sensor\n"); + ret = hi556_identify_module(hi556); if (ret) { dev_err(&client->dev, "failed to find sensor: %d", ret); - return ret; + goto probe_error_power_off; } } @@ -1344,9 +1417,16 @@ probe_error_v4l2_ctrl_handler_free: v4l2_ctrl_handler_free(hi556->sd.ctrl_handler); mutex_destroy(&hi556->mutex); +probe_error_power_off: + if (full_power) + hi556_suspend(&client->dev); + return ret; } +static DEFINE_RUNTIME_DEV_PM_OPS(hi556_pm_ops, hi556_suspend, hi556_resume, + NULL); + #ifdef CONFIG_ACPI static const struct acpi_device_id hi556_acpi_ids[] = { {"INT3537"}, @@ -1360,6 +1440,7 @@ static struct i2c_driver hi556_i2c_driver = { .driver = { .name = "hi556", .acpi_match_table = ACPI_PTR(hi556_acpi_ids), + .pm = pm_sleep_ptr(&hi556_pm_ops), }, .probe = hi556_probe, .remove = hi556_remove, diff --git a/drivers/media/i2c/imx214.c b/drivers/media/i2c/imx214.c index 10b6ad66d126..4962cfe7c83d 100644 --- a/drivers/media/i2c/imx214.c +++ b/drivers/media/i2c/imx214.c @@ -1114,6 +1114,7 @@ free_ctrl: v4l2_ctrl_handler_free(&imx214->ctrls); error_power_off: pm_runtime_disable(imx214->dev); + regulator_bulk_disable(IMX214_NUM_SUPPLIES, imx214->supplies); return ret; } diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c index e17ef2e9d9d0..51ebf5453fce 100644 --- a/drivers/media/i2c/imx219.c +++ b/drivers/media/i2c/imx219.c @@ -551,8 +551,7 @@ static int imx219_init_controls(struct imx219 *imx219) if (ctrl_hdlr->error) { ret = ctrl_hdlr->error; - dev_err(&client->dev, "%s control init failed (%d)\n", - __func__, ret); + dev_err_probe(&client->dev, ret, "Control init failed\n"); goto error; } @@ -1024,17 +1023,15 @@ static int imx219_identify_module(struct imx219 *imx219) u64 val; ret = cci_read(imx219->regmap, IMX219_REG_CHIP_ID, &val, NULL); - if (ret) { - dev_err(&client->dev, "failed to read chip id %x\n", - IMX219_CHIP_ID); - return ret; - } + if (ret) + return dev_err_probe(&client->dev, ret, + "failed to read chip id %x\n", + IMX219_CHIP_ID); - if (val != IMX219_CHIP_ID) { - dev_err(&client->dev, "chip id mismatch: %x!=%llx\n", - IMX219_CHIP_ID, val); - return -EIO; - } + if (val != IMX219_CHIP_ID) + return dev_err_probe(&client->dev, -EIO, + "chip id mismatch: %x!=%llx\n", + IMX219_CHIP_ID, val); return 0; } @@ -1048,35 +1045,36 @@ static int imx219_check_hwcfg(struct device *dev, struct imx219 *imx219) int ret = -EINVAL; endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL); - if (!endpoint) { - dev_err(dev, "endpoint node not found\n"); - return -EINVAL; - } + if (!endpoint) + return dev_err_probe(dev, -EINVAL, "endpoint node not found\n"); if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) { - dev_err(dev, "could not parse endpoint\n"); + dev_err_probe(dev, -EINVAL, "could not parse endpoint\n"); goto error_out; } /* Check the number of MIPI CSI2 data lanes */ if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2 && ep_cfg.bus.mipi_csi2.num_data_lanes != 4) { - dev_err(dev, "only 2 or 4 data lanes are currently supported\n"); + dev_err_probe(dev, -EINVAL, + "only 2 or 4 data lanes are currently supported\n"); goto error_out; } imx219->lanes = ep_cfg.bus.mipi_csi2.num_data_lanes; /* Check the link frequency set in device tree */ if (!ep_cfg.nr_of_link_frequencies) { - dev_err(dev, "link-frequency property not found in DT\n"); + dev_err_probe(dev, -EINVAL, + "link-frequency property not found in DT\n"); goto error_out; } if (ep_cfg.nr_of_link_frequencies != 1 || (ep_cfg.link_frequencies[0] != ((imx219->lanes == 2) ? IMX219_DEFAULT_LINK_FREQ : IMX219_DEFAULT_LINK_FREQ_4LANE))) { - dev_err(dev, "Link frequency not supported: %lld\n", - ep_cfg.link_frequencies[0]); + dev_err_probe(dev, -EINVAL, + "Link frequency not supported: %lld\n", + ep_cfg.link_frequencies[0]); goto error_out; } @@ -1107,31 +1105,25 @@ static int imx219_probe(struct i2c_client *client) return -EINVAL; imx219->regmap = devm_cci_regmap_init_i2c(client, 16); - if (IS_ERR(imx219->regmap)) { - ret = PTR_ERR(imx219->regmap); - dev_err(dev, "failed to initialize CCI: %d\n", ret); - return ret; - } + if (IS_ERR(imx219->regmap)) + return dev_err_probe(dev, PTR_ERR(imx219->regmap), + "failed to initialize CCI\n"); /* Get system clock (xclk) */ imx219->xclk = devm_clk_get(dev, NULL); - if (IS_ERR(imx219->xclk)) { - dev_err(dev, "failed to get xclk\n"); - return PTR_ERR(imx219->xclk); - } + if (IS_ERR(imx219->xclk)) + return dev_err_probe(dev, PTR_ERR(imx219->xclk), + "failed to get xclk\n"); imx219->xclk_freq = clk_get_rate(imx219->xclk); - if (imx219->xclk_freq != IMX219_XCLK_FREQ) { - dev_err(dev, "xclk frequency not supported: %d Hz\n", - imx219->xclk_freq); - return -EINVAL; - } + if (imx219->xclk_freq != IMX219_XCLK_FREQ) + return dev_err_probe(dev, -EINVAL, + "xclk frequency not supported: %d Hz\n", + imx219->xclk_freq); ret = imx219_get_regulators(imx219); - if (ret) { - dev_err(dev, "failed to get regulators\n"); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "failed to get regulators\n"); /* Request optional enable pin */ imx219->reset_gpio = devm_gpiod_get_optional(dev, "reset", @@ -1183,20 +1175,21 @@ static int imx219_probe(struct i2c_client *client) ret = media_entity_pads_init(&imx219->sd.entity, 1, &imx219->pad); if (ret) { - dev_err(dev, "failed to init entity pads: %d\n", ret); + dev_err_probe(dev, ret, "failed to init entity pads\n"); goto error_handler_free; } imx219->sd.state_lock = imx219->ctrl_handler.lock; ret = v4l2_subdev_init_finalize(&imx219->sd); if (ret < 0) { - dev_err(dev, "subdev init error: %d\n", ret); + dev_err_probe(dev, ret, "subdev init error\n"); goto error_media_entity; } ret = v4l2_async_register_subdev_sensor(&imx219->sd); if (ret < 0) { - dev_err(dev, "failed to register sensor sub-device: %d\n", ret); + dev_err_probe(dev, ret, + "failed to register sensor sub-device\n"); goto error_subdev_cleanup; } diff --git a/drivers/media/i2c/imx335.c b/drivers/media/i2c/imx335.c index dab6d080bc4c..990d74214cc2 100644 --- a/drivers/media/i2c/imx335.c +++ b/drivers/media/i2c/imx335.c @@ -11,57 +11,108 @@ #include <linux/i2c.h> #include <linux/module.h> #include <linux/pm_runtime.h> +#include <linux/regmap.h> +#include <media/v4l2-cci.h> #include <media/v4l2-ctrls.h> #include <media/v4l2-fwnode.h> #include <media/v4l2-subdev.h> /* Streaming Mode */ -#define IMX335_REG_MODE_SELECT 0x3000 -#define IMX335_MODE_STANDBY 0x01 -#define IMX335_MODE_STREAMING 0x00 +#define IMX335_REG_MODE_SELECT CCI_REG8(0x3000) +#define IMX335_MODE_STANDBY 0x01 +#define IMX335_MODE_STREAMING 0x00 + +/* Group hold register */ +#define IMX335_REG_HOLD CCI_REG8(0x3001) + +#define IMX335_REG_MASTER_MODE CCI_REG8(0x3002) +#define IMX335_REG_BCWAIT_TIME CCI_REG8(0x300c) +#define IMX335_REG_CPWAIT_TIME CCI_REG8(0x300d) +#define IMX335_REG_WINMODE CCI_REG8(0x3018) +#define IMX335_REG_HTRIMMING_START CCI_REG16_LE(0x302c) +#define IMX335_REG_HNUM CCI_REG8(0x302e) /* Lines per frame */ -#define IMX335_REG_LPFR 0x3030 +#define IMX335_REG_VMAX CCI_REG24_LE(0x3030) -/* Chip ID */ -#define IMX335_REG_ID 0x3912 -#define IMX335_ID 0x00 - -/* Exposure control */ -#define IMX335_REG_SHUTTER 0x3058 -#define IMX335_EXPOSURE_MIN 1 -#define IMX335_EXPOSURE_OFFSET 9 -#define IMX335_EXPOSURE_STEP 1 -#define IMX335_EXPOSURE_DEFAULT 0x0648 - -/* Analog gain control */ -#define IMX335_REG_AGAIN 0x30e8 -#define IMX335_AGAIN_MIN 0 -#define IMX335_AGAIN_MAX 240 -#define IMX335_AGAIN_STEP 1 -#define IMX335_AGAIN_DEFAULT 0 +#define IMX335_REG_OPB_SIZE_V CCI_REG8(0x304c) +#define IMX335_REG_ADBIT CCI_REG8(0x3050) +#define IMX335_REG_Y_OUT_SIZE CCI_REG16_LE(0x3056) -/* Group hold register */ -#define IMX335_REG_HOLD 0x3001 +#define IMX335_REG_SHUTTER CCI_REG24_LE(0x3058) +#define IMX335_EXPOSURE_MIN 1 +#define IMX335_EXPOSURE_OFFSET 9 +#define IMX335_EXPOSURE_STEP 1 +#define IMX335_EXPOSURE_DEFAULT 0x0648 + +#define IMX335_REG_AREA3_ST_ADR_1 CCI_REG16_LE(0x3074) +#define IMX335_REG_AREA3_WIDTH_1 CCI_REG16_LE(0x3076) + +/* Analog and Digital gain control */ +#define IMX335_REG_GAIN CCI_REG8(0x30e8) +#define IMX335_AGAIN_MIN 0 +#define IMX335_AGAIN_MAX 100 +#define IMX335_AGAIN_STEP 1 +#define IMX335_AGAIN_DEFAULT 0 + +#define IMX335_REG_TPG_TESTCLKEN CCI_REG8(0x3148) + +#define IMX335_REG_INCLKSEL1 CCI_REG16_LE(0x314c) +#define IMX335_REG_INCLKSEL2 CCI_REG8(0x315a) +#define IMX335_REG_INCLKSEL3 CCI_REG8(0x3168) +#define IMX335_REG_INCLKSEL4 CCI_REG8(0x316a) + +#define IMX335_REG_MDBIT CCI_REG8(0x319d) +#define IMX335_REG_SYSMODE CCI_REG8(0x319e) + +#define IMX335_REG_XVS_XHS_DRV CCI_REG8(0x31a1) /* Test pattern generator */ -#define IMX335_REG_TPG 0x329e -#define IMX335_TPG_ALL_000 0 -#define IMX335_TPG_ALL_FFF 1 -#define IMX335_TPG_ALL_555 2 -#define IMX335_TPG_ALL_AAA 3 -#define IMX335_TPG_TOG_555_AAA 4 -#define IMX335_TPG_TOG_AAA_555 5 -#define IMX335_TPG_TOG_000_555 6 -#define IMX335_TPG_TOG_555_000 7 -#define IMX335_TPG_TOG_000_FFF 8 -#define IMX335_TPG_TOG_FFF_000 9 -#define IMX335_TPG_H_COLOR_BARS 10 -#define IMX335_TPG_V_COLOR_BARS 11 +#define IMX335_REG_TPG_DIG_CLP_MODE CCI_REG8(0x3280) +#define IMX335_REG_TPG_EN_DUOUT CCI_REG8(0x329c) +#define IMX335_REG_TPG CCI_REG8(0x329e) +#define IMX335_TPG_ALL_000 0 +#define IMX335_TPG_ALL_FFF 1 +#define IMX335_TPG_ALL_555 2 +#define IMX335_TPG_ALL_AAA 3 +#define IMX335_TPG_TOG_555_AAA 4 +#define IMX335_TPG_TOG_AAA_555 5 +#define IMX335_TPG_TOG_000_555 6 +#define IMX335_TPG_TOG_555_000 7 +#define IMX335_TPG_TOG_000_FFF 8 +#define IMX335_TPG_TOG_FFF_000 9 +#define IMX335_TPG_H_COLOR_BARS 10 +#define IMX335_TPG_V_COLOR_BARS 11 +#define IMX335_REG_TPG_COLORWIDTH CCI_REG8(0x32a0) + +#define IMX335_REG_BLKLEVEL CCI_REG16_LE(0x3302) + +#define IMX335_REG_WRJ_OPEN CCI_REG8(0x336c) + +#define IMX335_REG_ADBIT1 CCI_REG16_LE(0x341c) + +/* Chip ID */ +#define IMX335_REG_ID CCI_REG8(0x3912) +#define IMX335_ID 0x00 + +/* Data Lanes */ +#define IMX335_REG_LANEMODE CCI_REG8(0x3a01) +#define IMX335_2LANE 1 +#define IMX335_4LANE 3 + +#define IMX335_REG_TCLKPOST CCI_REG16_LE(0x3a18) +#define IMX335_REG_TCLKPREPARE CCI_REG16_LE(0x3a1a) +#define IMX335_REG_TCLK_TRAIL CCI_REG16_LE(0x3a1c) +#define IMX335_REG_TCLK_ZERO CCI_REG16_LE(0x3a1e) +#define IMX335_REG_THS_PREPARE CCI_REG16_LE(0x3a20) +#define IMX335_REG_THS_ZERO CCI_REG16_LE(0x3a22) +#define IMX335_REG_THS_TRAIL CCI_REG16_LE(0x3a24) +#define IMX335_REG_THS_EXIT CCI_REG16_LE(0x3a26) +#define IMX335_REG_TPLX CCI_REG16_LE(0x3a28) /* Input clock rate */ -#define IMX335_INCLK_RATE 24000000 +#define IMX335_INCLK_RATE 24000000 /* CSI2 HW configuration */ #define IMX335_LINK_FREQ_594MHz 594000000LL @@ -69,9 +120,6 @@ #define IMX335_NUM_DATA_LANES 4 -#define IMX335_REG_MIN 0x00 -#define IMX335_REG_MAX 0xfffff - /* IMX335 native and active pixel array size. */ #define IMX335_NATIVE_WIDTH 2616U #define IMX335_NATIVE_HEIGHT 1964U @@ -81,23 +129,13 @@ #define IMX335_PIXEL_ARRAY_HEIGHT 1944U /** - * struct imx335_reg - imx335 sensor register - * @address: Register address - * @val: Register value - */ -struct imx335_reg { - u16 address; - u8 val; -}; - -/** * struct imx335_reg_list - imx335 sensor register list * @num_of_regs: Number of registers in the list * @regs: Pointer to register list */ struct imx335_reg_list { u32 num_of_regs; - const struct imx335_reg *regs; + const struct cci_reg_sequence *regs; }; static const char * const imx335_supply_name[] = { @@ -138,6 +176,7 @@ struct imx335_mode { * @pad: Media pad. Only one pad supported * @reset_gpio: Sensor reset gpio * @supplies: Regulator supplies to handle power control + * @cci: CCI register map * @inclk: Sensor input clock * @ctrl_handler: V4L2 control handler * @link_freq_ctrl: Pointer to link frequency control @@ -147,6 +186,7 @@ struct imx335_mode { * @exp_ctrl: Pointer to exposure control * @again_ctrl: Pointer to analog gain control * @vblank: Vertical blanking in lines + * @lane_mode: Mode for number of connected data lanes * @cur_mode: Pointer to current selected sensor mode * @mutex: Mutex for serializing sensor controls * @link_freq_bitmap: Menu bitmap for link_freq_ctrl @@ -159,6 +199,7 @@ struct imx335 { struct media_pad pad; struct gpio_desc *reset_gpio; struct regulator_bulk_data supplies[ARRAY_SIZE(imx335_supply_name)]; + struct regmap *cci; struct clk *inclk; struct v4l2_ctrl_handler ctrl_handler; @@ -171,6 +212,7 @@ struct imx335 { struct v4l2_ctrl *again_ctrl; }; u32 vblank; + u32 lane_mode; const struct imx335_mode *cur_mode; struct mutex mutex; unsigned long link_freq_bitmap; @@ -210,140 +252,135 @@ static const int imx335_tpg_val[] = { }; /* Sensor mode registers */ -static const struct imx335_reg mode_2592x1940_regs[] = { - {0x3000, 0x01}, - {0x3002, 0x00}, - {0x3018, 0x04}, - {0x302c, 0x3c}, - {0x302e, 0x20}, - {0x3056, 0x94}, - {0x3074, 0xc8}, - {0x3076, 0x28}, - {0x304c, 0x00}, - {0x31a1, 0x00}, - {0x3288, 0x21}, - {0x328a, 0x02}, - {0x3414, 0x05}, - {0x3416, 0x18}, - {0x3648, 0x01}, - {0x364a, 0x04}, - {0x364c, 0x04}, - {0x3678, 0x01}, - {0x367c, 0x31}, - {0x367e, 0x31}, - {0x3706, 0x10}, - {0x3708, 0x03}, - {0x3714, 0x02}, - {0x3715, 0x02}, - {0x3716, 0x01}, - {0x3717, 0x03}, - {0x371c, 0x3d}, - {0x371d, 0x3f}, - {0x372c, 0x00}, - {0x372d, 0x00}, - {0x372e, 0x46}, - {0x372f, 0x00}, - {0x3730, 0x89}, - {0x3731, 0x00}, - {0x3732, 0x08}, - {0x3733, 0x01}, - {0x3734, 0xfe}, - {0x3735, 0x05}, - {0x3740, 0x02}, - {0x375d, 0x00}, - {0x375e, 0x00}, - {0x375f, 0x11}, - {0x3760, 0x01}, - {0x3768, 0x1b}, - {0x3769, 0x1b}, - {0x376a, 0x1b}, - {0x376b, 0x1b}, - {0x376c, 0x1a}, - {0x376d, 0x17}, - {0x376e, 0x0f}, - {0x3776, 0x00}, - {0x3777, 0x00}, - {0x3778, 0x46}, - {0x3779, 0x00}, - {0x377a, 0x89}, - {0x377b, 0x00}, - {0x377c, 0x08}, - {0x377d, 0x01}, - {0x377e, 0x23}, - {0x377f, 0x02}, - {0x3780, 0xd9}, - {0x3781, 0x03}, - {0x3782, 0xf5}, - {0x3783, 0x06}, - {0x3784, 0xa5}, - {0x3788, 0x0f}, - {0x378a, 0xd9}, - {0x378b, 0x03}, - {0x378c, 0xeb}, - {0x378d, 0x05}, - {0x378e, 0x87}, - {0x378f, 0x06}, - {0x3790, 0xf5}, - {0x3792, 0x43}, - {0x3794, 0x7a}, - {0x3796, 0xa1}, - {0x37b0, 0x36}, - {0x3a00, 0x00}, +static const struct cci_reg_sequence mode_2592x1940_regs[] = { + { IMX335_REG_MODE_SELECT, IMX335_MODE_STANDBY }, + { IMX335_REG_MASTER_MODE, 0x00 }, + { IMX335_REG_WINMODE, 0x04 }, + { IMX335_REG_HTRIMMING_START, 48 }, + { IMX335_REG_HNUM, 2592 }, + { IMX335_REG_Y_OUT_SIZE, 1944 }, + { IMX335_REG_AREA3_ST_ADR_1, 176 }, + { IMX335_REG_AREA3_WIDTH_1, 3928 }, + { IMX335_REG_OPB_SIZE_V, 0 }, + { IMX335_REG_XVS_XHS_DRV, 0x00 }, + { CCI_REG8(0x3288), 0x21 }, + { CCI_REG8(0x328a), 0x02 }, + { CCI_REG8(0x3414), 0x05 }, + { CCI_REG8(0x3416), 0x18 }, + { CCI_REG8(0x3648), 0x01 }, + { CCI_REG8(0x364a), 0x04 }, + { CCI_REG8(0x364c), 0x04 }, + { CCI_REG8(0x3678), 0x01 }, + { CCI_REG8(0x367c), 0x31 }, + { CCI_REG8(0x367e), 0x31 }, + { CCI_REG8(0x3706), 0x10 }, + { CCI_REG8(0x3708), 0x03 }, + { CCI_REG8(0x3714), 0x02 }, + { CCI_REG8(0x3715), 0x02 }, + { CCI_REG8(0x3716), 0x01 }, + { CCI_REG8(0x3717), 0x03 }, + { CCI_REG8(0x371c), 0x3d }, + { CCI_REG8(0x371d), 0x3f }, + { CCI_REG8(0x372c), 0x00 }, + { CCI_REG8(0x372d), 0x00 }, + { CCI_REG8(0x372e), 0x46 }, + { CCI_REG8(0x372f), 0x00 }, + { CCI_REG8(0x3730), 0x89 }, + { CCI_REG8(0x3731), 0x00 }, + { CCI_REG8(0x3732), 0x08 }, + { CCI_REG8(0x3733), 0x01 }, + { CCI_REG8(0x3734), 0xfe }, + { CCI_REG8(0x3735), 0x05 }, + { CCI_REG8(0x3740), 0x02 }, + { CCI_REG8(0x375d), 0x00 }, + { CCI_REG8(0x375e), 0x00 }, + { CCI_REG8(0x375f), 0x11 }, + { CCI_REG8(0x3760), 0x01 }, + { CCI_REG8(0x3768), 0x1b }, + { CCI_REG8(0x3769), 0x1b }, + { CCI_REG8(0x376a), 0x1b }, + { CCI_REG8(0x376b), 0x1b }, + { CCI_REG8(0x376c), 0x1a }, + { CCI_REG8(0x376d), 0x17 }, + { CCI_REG8(0x376e), 0x0f }, + { CCI_REG8(0x3776), 0x00 }, + { CCI_REG8(0x3777), 0x00 }, + { CCI_REG8(0x3778), 0x46 }, + { CCI_REG8(0x3779), 0x00 }, + { CCI_REG8(0x377a), 0x89 }, + { CCI_REG8(0x377b), 0x00 }, + { CCI_REG8(0x377c), 0x08 }, + { CCI_REG8(0x377d), 0x01 }, + { CCI_REG8(0x377e), 0x23 }, + { CCI_REG8(0x377f), 0x02 }, + { CCI_REG8(0x3780), 0xd9 }, + { CCI_REG8(0x3781), 0x03 }, + { CCI_REG8(0x3782), 0xf5 }, + { CCI_REG8(0x3783), 0x06 }, + { CCI_REG8(0x3784), 0xa5 }, + { CCI_REG8(0x3788), 0x0f }, + { CCI_REG8(0x378a), 0xd9 }, + { CCI_REG8(0x378b), 0x03 }, + { CCI_REG8(0x378c), 0xeb }, + { CCI_REG8(0x378d), 0x05 }, + { CCI_REG8(0x378e), 0x87 }, + { CCI_REG8(0x378f), 0x06 }, + { CCI_REG8(0x3790), 0xf5 }, + { CCI_REG8(0x3792), 0x43 }, + { CCI_REG8(0x3794), 0x7a }, + { CCI_REG8(0x3796), 0xa1 }, + { CCI_REG8(0x37b0), 0x36 }, + { CCI_REG8(0x3a00), 0x00 }, }; -static const struct imx335_reg raw10_framefmt_regs[] = { - {0x3050, 0x00}, - {0x319d, 0x00}, - {0x341c, 0xff}, - {0x341d, 0x01}, +static const struct cci_reg_sequence raw10_framefmt_regs[] = { + { IMX335_REG_ADBIT, 0x00 }, + { IMX335_REG_MDBIT, 0x00 }, + { IMX335_REG_ADBIT1, 0x1ff }, }; -static const struct imx335_reg raw12_framefmt_regs[] = { - {0x3050, 0x01}, - {0x319d, 0x01}, - {0x341c, 0x47}, - {0x341d, 0x00}, +static const struct cci_reg_sequence raw12_framefmt_regs[] = { + { IMX335_REG_ADBIT, 0x01 }, + { IMX335_REG_MDBIT, 0x01 }, + { IMX335_REG_ADBIT1, 0x47 }, }; -static const struct imx335_reg mipi_data_rate_1188Mbps[] = { - {0x300c, 0x3b}, - {0x300d, 0x2a}, - {0x314c, 0xc6}, - {0x314d, 0x00}, - {0x315a, 0x02}, - {0x3168, 0xa0}, - {0x316a, 0x7e}, - {0x319e, 0x01}, - {0x3a18, 0x8f}, - {0x3a1a, 0x4f}, - {0x3a1c, 0x47}, - {0x3a1e, 0x37}, - {0x3a1f, 0x01}, - {0x3a20, 0x4f}, - {0x3a22, 0x87}, - {0x3a24, 0x4f}, - {0x3a26, 0x7f}, - {0x3a28, 0x3f}, +static const struct cci_reg_sequence mipi_data_rate_1188Mbps[] = { + { IMX335_REG_BCWAIT_TIME, 0x3b }, + { IMX335_REG_CPWAIT_TIME, 0x2a }, + { IMX335_REG_INCLKSEL1, 0x00c6 }, + { IMX335_REG_INCLKSEL2, 0x02 }, + { IMX335_REG_INCLKSEL3, 0xa0 }, + { IMX335_REG_INCLKSEL4, 0x7e }, + { IMX335_REG_SYSMODE, 0x01 }, + { IMX335_REG_TCLKPOST, 0x8f }, + { IMX335_REG_TCLKPREPARE, 0x4f }, + { IMX335_REG_TCLK_TRAIL, 0x47 }, + { IMX335_REG_TCLK_ZERO, 0x0137 }, + { IMX335_REG_THS_PREPARE, 0x4f }, + { IMX335_REG_THS_ZERO, 0x87 }, + { IMX335_REG_THS_TRAIL, 0x4f }, + { IMX335_REG_THS_EXIT, 0x7f }, + { IMX335_REG_TPLX, 0x3f }, }; -static const struct imx335_reg mipi_data_rate_891Mbps[] = { - {0x300c, 0x3b}, - {0x300d, 0x2a}, - {0x314c, 0x29}, - {0x314d, 0x01}, - {0x315a, 0x06}, - {0x3168, 0xa0}, - {0x316a, 0x7e}, - {0x319e, 0x02}, - {0x3a18, 0x7f}, - {0x3a1a, 0x37}, - {0x3a1c, 0x37}, - {0x3a1e, 0xf7}, - {0x3a20, 0x3f}, - {0x3a22, 0x6f}, - {0x3a24, 0x3f}, - {0x3a26, 0x5f}, - {0x3a28, 0x2f}, +static const struct cci_reg_sequence mipi_data_rate_891Mbps[] = { + { IMX335_REG_BCWAIT_TIME, 0x3b }, + { IMX335_REG_CPWAIT_TIME, 0x2a }, + { IMX335_REG_INCLKSEL1, 0x0129 }, + { IMX335_REG_INCLKSEL2, 0x06 }, + { IMX335_REG_INCLKSEL3, 0xa0 }, + { IMX335_REG_INCLKSEL4, 0x7e }, + { IMX335_REG_SYSMODE, 0x02 }, + { IMX335_REG_TCLKPOST, 0x7f }, + { IMX335_REG_TCLKPREPARE, 0x37 }, + { IMX335_REG_TCLK_TRAIL, 0x37 }, + { IMX335_REG_TCLK_ZERO, 0xf7 }, + { IMX335_REG_THS_PREPARE, 0x3f }, + { IMX335_REG_THS_ZERO, 0x6f }, + { IMX335_REG_THS_TRAIL, 0x3f }, + { IMX335_REG_THS_EXIT, 0x5f }, + { IMX335_REG_TPLX, 0x2f }, }; static const s64 link_freq[] = { @@ -372,10 +409,10 @@ static const u32 imx335_mbus_codes[] = { /* Supported sensor mode configurations */ static const struct imx335_mode supported_mode = { .width = 2592, - .height = 1940, + .height = 1944, .hblank = 342, - .vblank = 2560, - .vblank_min = 2560, + .vblank = 2556, + .vblank_min = 2556, .vblank_max = 133060, .pclk = 396000000, .reg_list = { @@ -396,101 +433,6 @@ static inline struct imx335 *to_imx335(struct v4l2_subdev *subdev) } /** - * imx335_read_reg() - Read registers. - * @imx335: pointer to imx335 device - * @reg: register address - * @len: length of bytes to read. Max supported bytes is 4 - * @val: pointer to register value to be filled. - * - * Big endian register addresses with little endian values. - * - * Return: 0 if successful, error code otherwise. - */ -static int imx335_read_reg(struct imx335 *imx335, u16 reg, u32 len, u32 *val) -{ - struct i2c_client *client = v4l2_get_subdevdata(&imx335->sd); - struct i2c_msg msgs[2] = {0}; - u8 addr_buf[2] = {0}; - u8 data_buf[4] = {0}; - int ret; - - if (WARN_ON(len > 4)) - return -EINVAL; - - put_unaligned_be16(reg, addr_buf); - - /* Write register address */ - msgs[0].addr = client->addr; - msgs[0].flags = 0; - msgs[0].len = ARRAY_SIZE(addr_buf); - msgs[0].buf = addr_buf; - - /* Read data from register */ - msgs[1].addr = client->addr; - msgs[1].flags = I2C_M_RD; - msgs[1].len = len; - msgs[1].buf = data_buf; - - ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); - if (ret != ARRAY_SIZE(msgs)) - return -EIO; - - *val = get_unaligned_le32(data_buf); - - return 0; -} - -/** - * imx335_write_reg() - Write register - * @imx335: pointer to imx335 device - * @reg: register address - * @len: length of bytes. Max supported bytes is 4 - * @val: register value - * - * Big endian register addresses with little endian values. - * - * Return: 0 if successful, error code otherwise. - */ -static int imx335_write_reg(struct imx335 *imx335, u16 reg, u32 len, u32 val) -{ - struct i2c_client *client = v4l2_get_subdevdata(&imx335->sd); - u8 buf[6] = {0}; - - if (WARN_ON(len > 4)) - return -EINVAL; - - put_unaligned_be16(reg, buf); - put_unaligned_le32(val, buf + 2); - if (i2c_master_send(client, buf, len + 2) != len + 2) - return -EIO; - - return 0; -} - -/** - * imx335_write_regs() - Write a list of registers - * @imx335: pointer to imx335 device - * @regs: list of registers to be written - * @len: length of registers array - * - * Return: 0 if successful. error code otherwise. - */ -static int imx335_write_regs(struct imx335 *imx335, - const struct imx335_reg *regs, u32 len) -{ - unsigned int i; - int ret; - - for (i = 0; i < len; i++) { - ret = imx335_write_reg(imx335, regs[i].address, 1, regs[i].val); - if (ret) - return ret; - } - - return 0; -} - -/** * imx335_update_controls() - Update control ranges based on streaming mode * @imx335: pointer to imx335 device * @mode: pointer to imx335_mode sensor mode @@ -526,7 +468,8 @@ static int imx335_update_controls(struct imx335 *imx335, static int imx335_update_exp_gain(struct imx335 *imx335, u32 exposure, u32 gain) { u32 lpfr, shutter; - int ret; + int ret_hold; + int ret = 0; lpfr = imx335->vblank + imx335->cur_mode->height; shutter = lpfr - exposure; @@ -534,64 +477,55 @@ static int imx335_update_exp_gain(struct imx335 *imx335, u32 exposure, u32 gain) dev_dbg(imx335->dev, "Set exp %u, analog gain %u, shutter %u, lpfr %u\n", exposure, gain, shutter, lpfr); - ret = imx335_write_reg(imx335, IMX335_REG_HOLD, 1, 1); - if (ret) - return ret; - - ret = imx335_write_reg(imx335, IMX335_REG_LPFR, 3, lpfr); - if (ret) - goto error_release_group_hold; - - ret = imx335_write_reg(imx335, IMX335_REG_SHUTTER, 3, shutter); - if (ret) - goto error_release_group_hold; - - ret = imx335_write_reg(imx335, IMX335_REG_AGAIN, 2, gain); - -error_release_group_hold: - imx335_write_reg(imx335, IMX335_REG_HOLD, 1, 0); + cci_write(imx335->cci, IMX335_REG_HOLD, 1, &ret); + cci_write(imx335->cci, IMX335_REG_VMAX, lpfr, &ret); + cci_write(imx335->cci, IMX335_REG_SHUTTER, shutter, &ret); + cci_write(imx335->cci, IMX335_REG_GAIN, gain, &ret); + /* + * Unconditionally attempt to release the hold, but track the + * error if the unhold itself fails. + */ + ret_hold = cci_write(imx335->cci, IMX335_REG_HOLD, 0, NULL); + if (ret_hold) + ret = ret_hold; return ret; } static int imx335_update_test_pattern(struct imx335 *imx335, u32 pattern_index) { - int ret; + int ret = 0; if (pattern_index >= ARRAY_SIZE(imx335_tpg_val)) return -EINVAL; if (pattern_index) { - const struct imx335_reg tpg_enable_regs[] = { - { 0x3148, 0x10 }, - { 0x3280, 0x00 }, - { 0x329c, 0x01 }, - { 0x32a0, 0x11 }, - { 0x3302, 0x00 }, - { 0x3303, 0x00 }, - { 0x336c, 0x00 }, + const struct cci_reg_sequence tpg_enable_regs[] = { + { IMX335_REG_TPG_TESTCLKEN, 0x10 }, + { IMX335_REG_TPG_DIG_CLP_MODE, 0x00 }, + { IMX335_REG_TPG_EN_DUOUT, 0x01 }, + { IMX335_REG_TPG_COLORWIDTH, 0x11 }, + { IMX335_REG_BLKLEVEL, 0x00 }, + { IMX335_REG_WRJ_OPEN, 0x00 }, }; - ret = imx335_write_reg(imx335, IMX335_REG_TPG, 1, - imx335_tpg_val[pattern_index]); - if (ret) - return ret; + cci_write(imx335->cci, IMX335_REG_TPG, + imx335_tpg_val[pattern_index], &ret); - ret = imx335_write_regs(imx335, tpg_enable_regs, - ARRAY_SIZE(tpg_enable_regs)); + cci_multi_reg_write(imx335->cci, tpg_enable_regs, + ARRAY_SIZE(tpg_enable_regs), &ret); } else { - const struct imx335_reg tpg_disable_regs[] = { - { 0x3148, 0x00 }, - { 0x3280, 0x01 }, - { 0x329c, 0x00 }, - { 0x32a0, 0x10 }, - { 0x3302, 0x32 }, - { 0x3303, 0x00 }, - { 0x336c, 0x01 }, + const struct cci_reg_sequence tpg_disable_regs[] = { + { IMX335_REG_TPG_TESTCLKEN, 0x00 }, + { IMX335_REG_TPG_DIG_CLP_MODE, 0x01 }, + { IMX335_REG_TPG_EN_DUOUT, 0x00 }, + { IMX335_REG_TPG_COLORWIDTH, 0x10 }, + { IMX335_REG_BLKLEVEL, 0x32 }, + { IMX335_REG_WRJ_OPEN, 0x01 }, }; - ret = imx335_write_regs(imx335, tpg_disable_regs, - ARRAY_SIZE(tpg_disable_regs)); + cci_multi_reg_write(imx335->cci, tpg_disable_regs, + ARRAY_SIZE(tpg_disable_regs), &ret); } return ret; @@ -890,12 +824,14 @@ static int imx335_set_framefmt(struct imx335 *imx335) { switch (imx335->cur_mbus_code) { case MEDIA_BUS_FMT_SRGGB10_1X10: - return imx335_write_regs(imx335, raw10_framefmt_regs, - ARRAY_SIZE(raw10_framefmt_regs)); + return cci_multi_reg_write(imx335->cci, raw10_framefmt_regs, + ARRAY_SIZE(raw10_framefmt_regs), + NULL); case MEDIA_BUS_FMT_SRGGB12_1X12: - return imx335_write_regs(imx335, raw12_framefmt_regs, - ARRAY_SIZE(raw12_framefmt_regs)); + return cci_multi_reg_write(imx335->cci, raw12_framefmt_regs, + ARRAY_SIZE(raw12_framefmt_regs), + NULL); } return -EINVAL; @@ -914,7 +850,8 @@ static int imx335_start_streaming(struct imx335 *imx335) /* Setup PLL */ reg_list = &link_freq_reglist[__ffs(imx335->link_freq_bitmap)]; - ret = imx335_write_regs(imx335, reg_list->regs, reg_list->num_of_regs); + ret = cci_multi_reg_write(imx335->cci, reg_list->regs, + reg_list->num_of_regs, NULL); if (ret) { dev_err(imx335->dev, "%s failed to set plls\n", __func__); return ret; @@ -922,8 +859,8 @@ static int imx335_start_streaming(struct imx335 *imx335) /* Write sensor mode registers */ reg_list = &imx335->cur_mode->reg_list; - ret = imx335_write_regs(imx335, reg_list->regs, - reg_list->num_of_regs); + ret = cci_multi_reg_write(imx335->cci, reg_list->regs, + reg_list->num_of_regs, NULL); if (ret) { dev_err(imx335->dev, "fail to write initial registers\n"); return ret; @@ -936,6 +873,12 @@ static int imx335_start_streaming(struct imx335 *imx335) return ret; } + /* Configure lanes */ + ret = cci_write(imx335->cci, IMX335_REG_LANEMODE, + imx335->lane_mode, NULL); + if (ret) + return ret; + /* Setup handler will write actual exposure and gain */ ret = __v4l2_ctrl_handler_setup(imx335->sd.ctrl_handler); if (ret) { @@ -944,8 +887,8 @@ static int imx335_start_streaming(struct imx335 *imx335) } /* Start streaming */ - ret = imx335_write_reg(imx335, IMX335_REG_MODE_SELECT, - 1, IMX335_MODE_STREAMING); + ret = cci_write(imx335->cci, IMX335_REG_MODE_SELECT, + IMX335_MODE_STREAMING, NULL); if (ret) { dev_err(imx335->dev, "fail to start streaming\n"); return ret; @@ -965,8 +908,8 @@ static int imx335_start_streaming(struct imx335 *imx335) */ static int imx335_stop_streaming(struct imx335 *imx335) { - return imx335_write_reg(imx335, IMX335_REG_MODE_SELECT, - 1, IMX335_MODE_STANDBY); + return cci_write(imx335->cci, IMX335_REG_MODE_SELECT, + IMX335_MODE_STANDBY, NULL); } /** @@ -1017,14 +960,14 @@ error_unlock: static int imx335_detect(struct imx335 *imx335) { int ret; - u32 val; + u64 val; - ret = imx335_read_reg(imx335, IMX335_REG_ID, 2, &val); + ret = cci_read(imx335->cci, IMX335_REG_ID, &val, NULL); if (ret) return ret; if (val != IMX335_ID) { - dev_err(imx335->dev, "chip id mismatch: %x!=%x\n", + dev_err(imx335->dev, "chip id mismatch: %x!=%llx\n", IMX335_ID, val); return -ENXIO; } @@ -1096,7 +1039,14 @@ static int imx335_parse_hw_config(struct imx335 *imx335) if (ret) return ret; - if (bus_cfg.bus.mipi_csi2.num_data_lanes != IMX335_NUM_DATA_LANES) { + switch (bus_cfg.bus.mipi_csi2.num_data_lanes) { + case 2: + imx335->lane_mode = IMX335_2LANE; + break; + case 4: + imx335->lane_mode = IMX335_4LANE; + break; + default: dev_err(imx335->dev, "number of CSI2 data lanes %d is not supported\n", bus_cfg.bus.mipi_csi2.num_data_lanes); @@ -1208,10 +1158,16 @@ static int imx335_init_controls(struct imx335 *imx335) { struct v4l2_ctrl_handler *ctrl_hdlr = &imx335->ctrl_handler; const struct imx335_mode *mode = imx335->cur_mode; + struct v4l2_fwnode_device_properties props; u32 lpfr; int ret; - ret = v4l2_ctrl_handler_init(ctrl_hdlr, 7); + ret = v4l2_fwnode_device_parse(imx335->dev, &props); + if (ret) + return ret; + + /* v4l2_fwnode_device_properties can add two more controls */ + ret = v4l2_ctrl_handler_init(ctrl_hdlr, 9); if (ret) return ret; @@ -1228,6 +1184,14 @@ static int imx335_init_controls(struct imx335 *imx335) IMX335_EXPOSURE_STEP, IMX335_EXPOSURE_DEFAULT); + /* + * The sensor has an analog gain and a digital gain, both controlled + * through a single gain value, expressed in 0.3dB increments. Values + * from 0.0dB (0) to 30.0dB (100) apply analog gain only, higher values + * up to 72.0dB (240) add further digital gain. Limit the range to + * analog gain only, support for digital gain can be added separately + * if needed. + */ imx335->again_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, &imx335_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, @@ -1276,6 +1240,8 @@ static int imx335_init_controls(struct imx335 *imx335) if (imx335->hblank_ctrl) imx335->hblank_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; + v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx335_ctrl_ops, &props); + if (ctrl_hdlr->error) { dev_err(imx335->dev, "control init failed: %d\n", ctrl_hdlr->error); @@ -1304,6 +1270,11 @@ static int imx335_probe(struct i2c_client *client) return -ENOMEM; imx335->dev = &client->dev; + imx335->cci = devm_cci_regmap_init_i2c(client, 16); + if (IS_ERR(imx335->cci)) { + dev_err(imx335->dev, "Unable to initialize I2C\n"); + return -ENODEV; + } /* Initialize subdev */ v4l2_i2c_subdev_init(&imx335->sd, client, &imx335_subdev_ops); diff --git a/drivers/media/i2c/max9271.h b/drivers/media/i2c/max9271.h index dc5e4e70ba6f..0bf1d40811eb 100644 --- a/drivers/media/i2c/max9271.h +++ b/drivers/media/i2c/max9271.h @@ -8,6 +8,9 @@ * Copyright (C) 2015 Cogent Embedded, Inc. */ +#ifndef __MEDIA_I2C_MAX9271_H__ +#define __MEDIA_I2C_MAX9271_H__ + #include <linux/i2c.h> #define MAX9271_DEFAULT_ADDR 0x40 @@ -231,3 +234,5 @@ int max9271_set_deserializer_address(struct max9271_device *dev, u8 addr); * Return 0 on success or a negative error code on failure */ int max9271_set_translation(struct max9271_device *dev, u8 source, u8 dest); + +#endif /* __MEDIA_I2C_MAX9271_H__ */ diff --git a/drivers/media/i2c/max9286.c b/drivers/media/i2c/max9286.c index d685d445cf23..dfcb3fc03350 100644 --- a/drivers/media/i2c/max9286.c +++ b/drivers/media/i2c/max9286.c @@ -383,7 +383,7 @@ static int max9286_i2c_mux_init(struct max9286_priv *priv) for_each_source(priv, source) { unsigned int index = to_index(priv, source); - ret = i2c_mux_add_adapter(priv->mux, 0, index, 0); + ret = i2c_mux_add_adapter(priv->mux, 0, index); if (ret < 0) goto error; } diff --git a/drivers/media/i2c/ov2680.c b/drivers/media/i2c/ov2680.c index 39d321e2b7f9..3ae0ea58668d 100644 --- a/drivers/media/i2c/ov2680.c +++ b/drivers/media/i2c/ov2680.c @@ -75,6 +75,8 @@ #define OV2680_ACTIVE_START_TOP 8 #define OV2680_MIN_CROP_WIDTH 2 #define OV2680_MIN_CROP_HEIGHT 2 +#define OV2680_MIN_VBLANK 4 +#define OV2680_MAX_VBLANK 0xffff /* Fixed pre-div of 1/2 */ #define OV2680_PLL_PREDIV0 2 @@ -84,10 +86,7 @@ /* 66MHz pixel clock: 66MHz / 1704 * 1294 = 30fps */ #define OV2680_PIXELS_PER_LINE 1704 -#define OV2680_LINES_PER_FRAME 1294 - -/* If possible send 16 extra rows / lines to the ISP as padding */ -#define OV2680_END_MARGIN 16 +#define OV2680_LINES_PER_FRAME_30FPS 1294 /* Max exposure time is VTS - 8 */ #define OV2680_INTEGRATION_TIME_MARGIN 8 @@ -130,6 +129,8 @@ struct ov2680_ctrls { struct v4l2_ctrl *test_pattern; struct v4l2_ctrl *link_freq; struct v4l2_ctrl *pixel_rate; + struct v4l2_ctrl *vblank; + struct v4l2_ctrl *hblank; }; struct ov2680_mode { @@ -143,8 +144,6 @@ struct ov2680_mode { u16 v_end; u16 h_output_size; u16 v_output_size; - u16 hts; - u16 vts; }; struct ov2680_dev { @@ -359,15 +358,11 @@ static void ov2680_calc_mode(struct ov2680_dev *sensor) sensor->mode.v_start = (sensor->mode.crop.top + (sensor->mode.crop.height - height) / 2) & ~1; sensor->mode.h_end = - min(sensor->mode.h_start + width + OV2680_END_MARGIN - 1, - OV2680_NATIVE_WIDTH - 1); + min(sensor->mode.h_start + width - 1, OV2680_NATIVE_WIDTH - 1); sensor->mode.v_end = - min(sensor->mode.v_start + height + OV2680_END_MARGIN - 1, - OV2680_NATIVE_HEIGHT - 1); + min(sensor->mode.v_start + height - 1, OV2680_NATIVE_HEIGHT - 1); sensor->mode.h_output_size = orig_width; sensor->mode.v_output_size = orig_height; - sensor->mode.hts = OV2680_PIXELS_PER_LINE; - sensor->mode.vts = OV2680_LINES_PER_FRAME; } static int ov2680_set_mode(struct ov2680_dev *sensor) @@ -402,9 +397,8 @@ static int ov2680_set_mode(struct ov2680_dev *sensor) cci_write(sensor->regmap, OV2680_REG_VERTICAL_OUTPUT_SIZE, sensor->mode.v_output_size, &ret); cci_write(sensor->regmap, OV2680_REG_TIMING_HTS, - sensor->mode.hts, &ret); - cci_write(sensor->regmap, OV2680_REG_TIMING_VTS, - sensor->mode.vts, &ret); + OV2680_PIXELS_PER_LINE, &ret); + /* VTS gets set by the vblank ctrl */ cci_write(sensor->regmap, OV2680_REG_ISP_X_WIN, 0, &ret); cci_write(sensor->regmap, OV2680_REG_ISP_Y_WIN, 0, &ret); cci_write(sensor->regmap, OV2680_REG_X_INC, inc, &ret); @@ -478,6 +472,15 @@ static int ov2680_exposure_set(struct ov2680_dev *sensor, u32 exp) NULL); } +static int ov2680_exposure_update_range(struct ov2680_dev *sensor) +{ + int exp_max = sensor->mode.fmt.height + sensor->ctrls.vblank->val - + OV2680_INTEGRATION_TIME_MARGIN; + + return __v4l2_ctrl_modify_range(sensor->ctrls.exposure, 0, exp_max, + 1, exp_max); +} + static int ov2680_stream_enable(struct ov2680_dev *sensor) { int ret; @@ -644,7 +647,7 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *try_fmt; const struct v4l2_rect *crop; unsigned int width, height; - int ret = 0; + int def, max, ret = 0; crop = __ov2680_get_pad_crop(sensor, sd_state, format->pad, format->which); @@ -673,6 +676,27 @@ static int ov2680_set_fmt(struct v4l2_subdev *sd, sensor->mode.fmt = format->format; ov2680_calc_mode(sensor); + /* vblank range is height dependent adjust and reset to default */ + max = OV2680_MAX_VBLANK - height; + def = OV2680_LINES_PER_FRAME_30FPS - height; + ret = __v4l2_ctrl_modify_range(sensor->ctrls.vblank, OV2680_MIN_VBLANK, + max, 1, def); + if (ret) + goto unlock; + + ret = __v4l2_ctrl_s_ctrl(sensor->ctrls.vblank, def); + if (ret) + goto unlock; + + /* exposure range depends on vts which may have changed */ + ret = ov2680_exposure_update_range(sensor); + if (ret) + goto unlock; + + /* adjust hblank value for new width */ + def = OV2680_PIXELS_PER_LINE - width; + ret = __v4l2_ctrl_modify_range(sensor->ctrls.hblank, def, def, 1, def); + unlock: mutex_unlock(&sensor->lock); @@ -842,6 +866,13 @@ static int ov2680_s_ctrl(struct v4l2_ctrl *ctrl) struct ov2680_dev *sensor = to_ov2680_dev(sd); int ret; + /* Update exposure range on vblank changes */ + if (ctrl->id == V4L2_CID_VBLANK) { + ret = ov2680_exposure_update_range(sensor); + if (ret) + return ret; + } + /* Only apply changes to the controls if the device is powered up */ if (!pm_runtime_get_if_in_use(sensor->sd.dev)) { ov2680_set_bayer_order(sensor, &sensor->mode.fmt); @@ -864,6 +895,10 @@ static int ov2680_s_ctrl(struct v4l2_ctrl *ctrl) case V4L2_CID_TEST_PATTERN: ret = ov2680_test_pattern_set(sensor, ctrl->val); break; + case V4L2_CID_VBLANK: + ret = cci_write(sensor->regmap, OV2680_REG_TIMING_VTS, + sensor->mode.fmt.height + ctrl->val, NULL); + break; default: ret = -EINVAL; break; @@ -922,8 +957,8 @@ static int ov2680_v4l2_register(struct ov2680_dev *sensor) const struct v4l2_ctrl_ops *ops = &ov2680_ctrl_ops; struct ov2680_ctrls *ctrls = &sensor->ctrls; struct v4l2_ctrl_handler *hdl = &ctrls->handler; - int exp_max = OV2680_LINES_PER_FRAME - OV2680_INTEGRATION_TIME_MARGIN; - int ret = 0; + struct v4l2_fwnode_device_properties props; + int def, max, ret = 0; v4l2_i2c_subdev_init(&sensor->sd, client, &ov2680_subdev_ops); sensor->sd.internal_ops = &ov2680_internal_ops; @@ -948,8 +983,9 @@ static int ov2680_v4l2_register(struct ov2680_dev *sensor) ARRAY_SIZE(test_pattern_menu) - 1, 0, 0, test_pattern_menu); + max = OV2680_LINES_PER_FRAME_30FPS - OV2680_INTEGRATION_TIME_MARGIN; ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE, - 0, exp_max, 1, exp_max); + 0, max, 1, max); ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN, 0, 1023, 1, 250); @@ -960,6 +996,21 @@ static int ov2680_v4l2_register(struct ov2680_dev *sensor) 0, sensor->pixel_rate, 1, sensor->pixel_rate); + max = OV2680_MAX_VBLANK - OV2680_DEFAULT_HEIGHT; + def = OV2680_LINES_PER_FRAME_30FPS - OV2680_DEFAULT_HEIGHT; + ctrls->vblank = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VBLANK, + OV2680_MIN_VBLANK, max, 1, def); + + def = OV2680_PIXELS_PER_LINE - OV2680_DEFAULT_WIDTH; + ctrls->hblank = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HBLANK, + def, def, 1, def); + + ret = v4l2_fwnode_device_parse(sensor->dev, &props); + if (ret) + goto cleanup_entity; + + v4l2_ctrl_new_fwnode_properties(hdl, ops, &props); + if (hdl->error) { ret = hdl->error; goto cleanup_entity; @@ -968,6 +1019,7 @@ static int ov2680_v4l2_register(struct ov2680_dev *sensor) ctrls->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; ctrls->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; + ctrls->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; sensor->sd.ctrl_handler = hdl; @@ -1116,25 +1168,24 @@ static int ov2680_parse_dt(struct ov2680_dev *sensor) sensor->pixel_rate = sensor->link_freq[0] * 2; do_div(sensor->pixel_rate, 10); - /* Verify bus cfg */ - if (bus_cfg.bus.mipi_csi2.num_data_lanes != 1) { - ret = dev_err_probe(dev, -EINVAL, - "only a 1-lane CSI2 config is supported"); - goto out_free_bus_cfg; + if (!bus_cfg.nr_of_link_frequencies) { + dev_warn(dev, "Consider passing 'link-frequencies' in DT\n"); + goto skip_link_freq_validation; } for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++) if (bus_cfg.link_frequencies[i] == sensor->link_freq[0]) break; - if (bus_cfg.nr_of_link_frequencies == 0 || - bus_cfg.nr_of_link_frequencies == i) { + if (bus_cfg.nr_of_link_frequencies == i) { ret = dev_err_probe(dev, -EINVAL, "supported link freq %lld not found\n", sensor->link_freq[0]); goto out_free_bus_cfg; } +skip_link_freq_validation: + ret = 0; out_free_bus_cfg: v4l2_fwnode_endpoint_free(&bus_cfg); return ret; diff --git a/drivers/media/i2c/ov2740.c b/drivers/media/i2c/ov2740.c index 552935ccb4a9..c48dbcde9877 100644 --- a/drivers/media/i2c/ov2740.c +++ b/drivers/media/i2c/ov2740.c @@ -768,14 +768,15 @@ static int ov2740_init_controls(struct ov2740 *ov2740) cur_mode = ov2740->cur_mode; size = ARRAY_SIZE(link_freq_menu_items); - ov2740->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov2740_ctrl_ops, - V4L2_CID_LINK_FREQ, - size - 1, 0, - link_freq_menu_items); + ov2740->link_freq = + v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov2740_ctrl_ops, + V4L2_CID_LINK_FREQ, size - 1, + ov2740->supported_modes->link_freq_index, + link_freq_menu_items); if (ov2740->link_freq) ov2740->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; - pixel_rate = to_pixel_rate(OV2740_LINK_FREQ_360MHZ_INDEX); + pixel_rate = to_pixel_rate(ov2740->supported_modes->link_freq_index); ov2740->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov2740_ctrl_ops, V4L2_CID_PIXEL_RATE, 0, pixel_rate, 1, pixel_rate); @@ -1332,9 +1333,16 @@ static int ov2740_probe(struct i2c_client *client) return dev_err_probe(dev, ret, "failed to check HW configuration\n"); ov2740->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); - if (IS_ERR(ov2740->reset_gpio)) + if (IS_ERR(ov2740->reset_gpio)) { return dev_err_probe(dev, PTR_ERR(ov2740->reset_gpio), "failed to get reset GPIO\n"); + } else if (ov2740->reset_gpio) { + /* + * Ensure reset is asserted for at least 20 ms before + * ov2740_resume() deasserts it. + */ + msleep(20); + } ov2740->clk = devm_clk_get_optional(dev, "clk"); if (IS_ERR(ov2740->clk)) diff --git a/drivers/media/i2c/ov4689.c b/drivers/media/i2c/ov4689.c index 403091651885..1c3a449f9354 100644 --- a/drivers/media/i2c/ov4689.c +++ b/drivers/media/i2c/ov4689.c @@ -3,7 +3,7 @@ * ov4689 driver * * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd. - * Copyright (C) 2022 Mikhail Rudenko + * Copyright (C) 2022, 2024 Mikhail Rudenko */ #include <linux/clk.h> @@ -15,45 +15,86 @@ #include <linux/regulator/consumer.h> #include <media/media-entity.h> #include <media/v4l2-async.h> +#include <media/v4l2-cci.h> #include <media/v4l2-ctrls.h> #include <media/v4l2-subdev.h> #include <media/v4l2-fwnode.h> -#define CHIP_ID 0x004688 -#define OV4689_REG_CHIP_ID 0x300a - -#define OV4689_XVCLK_FREQ 24000000 - -#define OV4689_REG_CTRL_MODE 0x0100 +#define OV4689_REG_CTRL_MODE CCI_REG8(0x0100) #define OV4689_MODE_SW_STANDBY 0x0 #define OV4689_MODE_STREAMING BIT(0) -#define OV4689_REG_EXPOSURE 0x3500 +#define OV4689_REG_CHIP_ID CCI_REG16(0x300a) +#define CHIP_ID 0x004688 + +#define OV4689_REG_EXPOSURE CCI_REG24(0x3500) #define OV4689_EXPOSURE_MIN 4 #define OV4689_EXPOSURE_STEP 1 -#define OV4689_VTS_MAX 0x7fff -#define OV4689_REG_GAIN_H 0x3508 -#define OV4689_REG_GAIN_L 0x3509 -#define OV4689_GAIN_H_MASK 0x07 -#define OV4689_GAIN_H_SHIFT 8 -#define OV4689_GAIN_L_MASK 0xff +#define OV4689_REG_GAIN CCI_REG16(0x3508) #define OV4689_GAIN_STEP 1 #define OV4689_GAIN_DEFAULT 0x80 -#define OV4689_REG_TEST_PATTERN 0x5040 -#define OV4689_TEST_PATTERN_ENABLE 0x80 -#define OV4689_TEST_PATTERN_DISABLE 0x0 +#define OV4689_REG_DIG_GAIN CCI_REG16(0x352a) +#define OV4689_DIG_GAIN_MIN 1 +#define OV4689_DIG_GAIN_MAX 0x7fff +#define OV4689_DIG_GAIN_STEP 1 +#define OV4689_DIG_GAIN_DEFAULT 0x800 -#define OV4689_REG_VTS 0x380e +#define OV4689_REG_H_CROP_START CCI_REG16(0x3800) +#define OV4689_REG_V_CROP_START CCI_REG16(0x3802) +#define OV4689_REG_H_CROP_END CCI_REG16(0x3804) +#define OV4689_REG_V_CROP_END CCI_REG16(0x3806) +#define OV4689_REG_H_OUTPUT_SIZE CCI_REG16(0x3808) +#define OV4689_REG_V_OUTPUT_SIZE CCI_REG16(0x380a) -#define REG_NULL 0xFFFF +#define OV4689_REG_HTS CCI_REG16(0x380c) +#define OV4689_HTS_DIVIDER 4 +#define OV4689_HTS_MAX 0x7fff -#define OV4689_REG_VALUE_08BIT 1 -#define OV4689_REG_VALUE_16BIT 2 -#define OV4689_REG_VALUE_24BIT 3 +#define OV4689_REG_VTS CCI_REG16(0x380e) +#define OV4689_VTS_MAX 0x7fff + +#define OV4689_REG_H_WIN_OFF CCI_REG16(0x3810) +#define OV4689_REG_V_WIN_OFF CCI_REG16(0x3812) + +#define OV4689_REG_TIMING_FORMAT1 CCI_REG8(0x3820) /* Vertical */ +#define OV4689_REG_TIMING_FORMAT2 CCI_REG8(0x3821) /* Horizontal */ +#define OV4689_TIMING_FLIP_MASK GENMASK(2, 1) +#define OV4689_TIMING_FLIP_ARRAY BIT(1) +#define OV4689_TIMING_FLIP_DIGITAL BIT(2) +#define OV4689_TIMING_FLIP_BOTH (OV4689_TIMING_FLIP_ARRAY |\ + OV4689_TIMING_FLIP_DIGITAL) + +#define OV4689_REG_ANCHOR_LEFT_START CCI_REG16(0x4020) +#define OV4689_ANCHOR_LEFT_START_DEF 576 +#define OV4689_REG_ANCHOR_LEFT_END CCI_REG16(0x4022) +#define OV4689_ANCHOR_LEFT_END_DEF 831 +#define OV4689_REG_ANCHOR_RIGHT_START CCI_REG16(0x4024) +#define OV4689_ANCHOR_RIGHT_START_DEF 1984 +#define OV4689_REG_ANCHOR_RIGHT_END CCI_REG16(0x4026) +#define OV4689_ANCHOR_RIGHT_END_DEF 2239 + +#define OV4689_REG_VFIFO_CTRL_01 CCI_REG8(0x4601) + +#define OV4689_REG_WB_GAIN_RED CCI_REG16(0x500c) +#define OV4689_REG_WB_GAIN_BLUE CCI_REG16(0x5010) +#define OV4689_WB_GAIN_MIN 1 +#define OV4689_WB_GAIN_MAX 0xfff +#define OV4689_WB_GAIN_STEP 1 +#define OV4689_WB_GAIN_DEFAULT 0x400 + +#define OV4689_REG_TEST_PATTERN CCI_REG8(0x5040) +#define OV4689_TEST_PATTERN_ENABLE 0x80 +#define OV4689_TEST_PATTERN_DISABLE 0x0 #define OV4689_LANES 4 +#define OV4689_XVCLK_FREQ 24000000 + +#define OV4689_PIXEL_ARRAY_WIDTH 2720 +#define OV4689_PIXEL_ARRAY_HEIGHT 1536 +#define OV4689_DUMMY_ROWS 8 /* 8 dummy rows on each side */ +#define OV4689_DUMMY_COLUMNS 16 /* 16 dummy columns on each side */ static const char *const ov4689_supply_names[] = { "avdd", /* Analog power */ @@ -61,11 +102,6 @@ static const char *const ov4689_supply_names[] = { "dvdd", /* Digital core power */ }; -struct regval { - u16 addr; - u8 val; -}; - enum ov4689_mode_id { OV4689_MODE_2688_1520 = 0, OV4689_NUM_MODES, @@ -75,20 +111,18 @@ struct ov4689_mode { enum ov4689_mode_id id; u32 width; u32 height; - u32 max_fps; u32 hts_def; + u32 hts_min; u32 vts_def; u32 exp_def; u32 pixel_rate; - u32 sensor_width; - u32 sensor_height; - u32 crop_top; - u32 crop_left; - const struct regval *reg_list; + const struct cci_reg_sequence *reg_list; + unsigned int num_regs; }; struct ov4689 { - struct i2c_client *client; + struct device *dev; + struct regmap *regmap; struct clk *xvclk; struct gpio_desc *reset_gpio; struct gpio_desc *pwdn_gpio; @@ -99,7 +133,6 @@ struct ov4689 { u32 clock_rate; - struct mutex mutex; /* lock to protect ctrls and cur_mode */ struct v4l2_ctrl_handler ctrl_handler; struct v4l2_ctrl *exposure; @@ -119,95 +152,108 @@ struct ov4689_gain_range { /* * Xclk 24Mhz - * max_framerate 30fps + * max_framerate 90fps * mipi_datarate per lane 1008Mbps */ -static const struct regval ov4689_2688x1520_regs[] = { - {0x0103, 0x01}, {0x3638, 0x00}, {0x0300, 0x00}, - {0x0302, 0x2a}, {0x0303, 0x00}, {0x0304, 0x03}, - {0x030b, 0x00}, {0x030d, 0x1e}, {0x030e, 0x04}, - {0x030f, 0x01}, {0x0312, 0x01}, {0x031e, 0x00}, - {0x3000, 0x20}, {0x3002, 0x00}, {0x3018, 0x72}, - {0x3020, 0x93}, {0x3021, 0x03}, {0x3022, 0x01}, - {0x3031, 0x0a}, {0x303f, 0x0c}, {0x3305, 0xf1}, - {0x3307, 0x04}, {0x3309, 0x29}, {0x3500, 0x00}, - {0x3501, 0x60}, {0x3502, 0x00}, {0x3503, 0x04}, - {0x3504, 0x00}, {0x3505, 0x00}, {0x3506, 0x00}, - {0x3507, 0x00}, {0x3508, 0x00}, {0x3509, 0x80}, - {0x350a, 0x00}, {0x350b, 0x00}, {0x350c, 0x00}, - {0x350d, 0x00}, {0x350e, 0x00}, {0x350f, 0x80}, - {0x3510, 0x00}, {0x3511, 0x00}, {0x3512, 0x00}, - {0x3513, 0x00}, {0x3514, 0x00}, {0x3515, 0x80}, - {0x3516, 0x00}, {0x3517, 0x00}, {0x3518, 0x00}, - {0x3519, 0x00}, {0x351a, 0x00}, {0x351b, 0x80}, - {0x351c, 0x00}, {0x351d, 0x00}, {0x351e, 0x00}, - {0x351f, 0x00}, {0x3520, 0x00}, {0x3521, 0x80}, - {0x3522, 0x08}, {0x3524, 0x08}, {0x3526, 0x08}, - {0x3528, 0x08}, {0x352a, 0x08}, {0x3602, 0x00}, - {0x3603, 0x40}, {0x3604, 0x02}, {0x3605, 0x00}, - {0x3606, 0x00}, {0x3607, 0x00}, {0x3609, 0x12}, - {0x360a, 0x40}, {0x360c, 0x08}, {0x360f, 0xe5}, - {0x3608, 0x8f}, {0x3611, 0x00}, {0x3613, 0xf7}, - {0x3616, 0x58}, {0x3619, 0x99}, {0x361b, 0x60}, - {0x361c, 0x7a}, {0x361e, 0x79}, {0x361f, 0x02}, - {0x3632, 0x00}, {0x3633, 0x10}, {0x3634, 0x10}, - {0x3635, 0x10}, {0x3636, 0x15}, {0x3646, 0x86}, - {0x364a, 0x0b}, {0x3700, 0x17}, {0x3701, 0x22}, - {0x3703, 0x10}, {0x370a, 0x37}, {0x3705, 0x00}, - {0x3706, 0x63}, {0x3709, 0x3c}, {0x370b, 0x01}, - {0x370c, 0x30}, {0x3710, 0x24}, {0x3711, 0x0c}, - {0x3716, 0x00}, {0x3720, 0x28}, {0x3729, 0x7b}, - {0x372a, 0x84}, {0x372b, 0xbd}, {0x372c, 0xbc}, - {0x372e, 0x52}, {0x373c, 0x0e}, {0x373e, 0x33}, - {0x3743, 0x10}, {0x3744, 0x88}, {0x3745, 0xc0}, - {0x374a, 0x43}, {0x374c, 0x00}, {0x374e, 0x23}, - {0x3751, 0x7b}, {0x3752, 0x84}, {0x3753, 0xbd}, - {0x3754, 0xbc}, {0x3756, 0x52}, {0x375c, 0x00}, - {0x3760, 0x00}, {0x3761, 0x00}, {0x3762, 0x00}, - {0x3763, 0x00}, {0x3764, 0x00}, {0x3767, 0x04}, - {0x3768, 0x04}, {0x3769, 0x08}, {0x376a, 0x08}, - {0x376b, 0x20}, {0x376c, 0x00}, {0x376d, 0x00}, - {0x376e, 0x00}, {0x3773, 0x00}, {0x3774, 0x51}, - {0x3776, 0xbd}, {0x3777, 0xbd}, {0x3781, 0x18}, - {0x3783, 0x25}, {0x3798, 0x1b}, {0x3800, 0x00}, - {0x3801, 0x08}, {0x3802, 0x00}, {0x3803, 0x04}, - {0x3804, 0x0a}, {0x3805, 0x97}, {0x3806, 0x05}, - {0x3807, 0xfb}, {0x3808, 0x0a}, {0x3809, 0x80}, - {0x380a, 0x05}, {0x380b, 0xf0}, {0x380c, 0x0a}, - {0x380d, 0x0e}, {0x380e, 0x06}, {0x380f, 0x12}, - {0x3810, 0x00}, {0x3811, 0x08}, {0x3812, 0x00}, - {0x3813, 0x04}, {0x3814, 0x01}, {0x3815, 0x01}, - {0x3819, 0x01}, {0x3820, 0x00}, {0x3821, 0x06}, - {0x3829, 0x00}, {0x382a, 0x01}, {0x382b, 0x01}, - {0x382d, 0x7f}, {0x3830, 0x04}, {0x3836, 0x01}, - {0x3837, 0x00}, {0x3841, 0x02}, {0x3846, 0x08}, - {0x3847, 0x07}, {0x3d85, 0x36}, {0x3d8c, 0x71}, - {0x3d8d, 0xcb}, {0x3f0a, 0x00}, {0x4000, 0xf1}, - {0x4001, 0x40}, {0x4002, 0x04}, {0x4003, 0x14}, - {0x400e, 0x00}, {0x4011, 0x00}, {0x401a, 0x00}, - {0x401b, 0x00}, {0x401c, 0x00}, {0x401d, 0x00}, - {0x401f, 0x00}, {0x4020, 0x00}, {0x4021, 0x10}, - {0x4022, 0x07}, {0x4023, 0xcf}, {0x4024, 0x09}, - {0x4025, 0x60}, {0x4026, 0x09}, {0x4027, 0x6f}, - {0x4028, 0x00}, {0x4029, 0x02}, {0x402a, 0x06}, - {0x402b, 0x04}, {0x402c, 0x02}, {0x402d, 0x02}, - {0x402e, 0x0e}, {0x402f, 0x04}, {0x4302, 0xff}, - {0x4303, 0xff}, {0x4304, 0x00}, {0x4305, 0x00}, - {0x4306, 0x00}, {0x4308, 0x02}, {0x4500, 0x6c}, - {0x4501, 0xc4}, {0x4502, 0x40}, {0x4503, 0x01}, - {0x4601, 0xa7}, {0x4800, 0x04}, {0x4813, 0x08}, - {0x481f, 0x40}, {0x4829, 0x78}, {0x4837, 0x10}, - {0x4b00, 0x2a}, {0x4b0d, 0x00}, {0x4d00, 0x04}, - {0x4d01, 0x42}, {0x4d02, 0xd1}, {0x4d03, 0x93}, - {0x4d04, 0xf5}, {0x4d05, 0xc1}, {0x5000, 0xf3}, - {0x5001, 0x11}, {0x5004, 0x00}, {0x500a, 0x00}, - {0x500b, 0x00}, {0x5032, 0x00}, {0x5040, 0x00}, - {0x5050, 0x0c}, {0x5500, 0x00}, {0x5501, 0x10}, - {0x5502, 0x01}, {0x5503, 0x0f}, {0x8000, 0x00}, - {0x8001, 0x00}, {0x8002, 0x00}, {0x8003, 0x00}, - {0x8004, 0x00}, {0x8005, 0x00}, {0x8006, 0x00}, - {0x8007, 0x00}, {0x8008, 0x00}, {0x3638, 0x00}, - {REG_NULL, 0x00}, +static const struct cci_reg_sequence ov4689_2688x1520_regs[] = { + /* System control*/ + { CCI_REG8(0x0103), 0x01 }, /* SC_CTRL0103 software_reset = 1 */ + { CCI_REG8(0x3000), 0x20 }, /* SC_CMMN_PAD_OEN0 FSIN_output_enable = 1 */ + { CCI_REG8(0x3021), 0x03 }, /* + * SC_CMMN_MISC_CTRL fst_stby_ctr = 0, + * sleep_no_latch_enable = 0 + */ + + /* AEC PK */ + { CCI_REG8(0x3503), 0x04 }, /* AEC_MANUAL gain_input_as_sensor_gain_format = 1 */ + + /* ADC and analog control*/ + { CCI_REG8(0x3603), 0x40 }, + { CCI_REG8(0x3604), 0x02 }, + { CCI_REG8(0x3609), 0x12 }, + { CCI_REG8(0x360c), 0x08 }, + { CCI_REG8(0x360f), 0xe5 }, + { CCI_REG8(0x3608), 0x8f }, + { CCI_REG8(0x3611), 0x00 }, + { CCI_REG8(0x3613), 0xf7 }, + { CCI_REG8(0x3616), 0x58 }, + { CCI_REG8(0x3619), 0x99 }, + { CCI_REG8(0x361b), 0x60 }, + { CCI_REG8(0x361e), 0x79 }, + { CCI_REG8(0x3634), 0x10 }, + { CCI_REG8(0x3635), 0x10 }, + { CCI_REG8(0x3636), 0x15 }, + { CCI_REG8(0x3646), 0x86 }, + { CCI_REG8(0x364a), 0x0b }, + + /* Sensor control */ + { CCI_REG8(0x3700), 0x17 }, + { CCI_REG8(0x3701), 0x22 }, + { CCI_REG8(0x3703), 0x10 }, + { CCI_REG8(0x370a), 0x37 }, + { CCI_REG8(0x3706), 0x63 }, + { CCI_REG8(0x3709), 0x3c }, + { CCI_REG8(0x370c), 0x30 }, + { CCI_REG8(0x3710), 0x24 }, + { CCI_REG8(0x3720), 0x28 }, + { CCI_REG8(0x3729), 0x7b }, + { CCI_REG8(0x372b), 0xbd }, + { CCI_REG8(0x372c), 0xbc }, + { CCI_REG8(0x372e), 0x52 }, + { CCI_REG8(0x373c), 0x0e }, + { CCI_REG8(0x373e), 0x33 }, + { CCI_REG8(0x3743), 0x10 }, + { CCI_REG8(0x3744), 0x88 }, + { CCI_REG8(0x3745), 0xc0 }, + { CCI_REG8(0x374c), 0x00 }, + { CCI_REG8(0x374e), 0x23 }, + { CCI_REG8(0x3751), 0x7b }, + { CCI_REG8(0x3753), 0xbd }, + { CCI_REG8(0x3754), 0xbc }, + { CCI_REG8(0x3756), 0x52 }, + { CCI_REG8(0x376b), 0x20 }, + { CCI_REG8(0x3774), 0x51 }, + { CCI_REG8(0x3776), 0xbd }, + { CCI_REG8(0x3777), 0xbd }, + { CCI_REG8(0x3781), 0x18 }, + { CCI_REG8(0x3783), 0x25 }, + { CCI_REG8(0x3798), 0x1b }, + + /* Timing control */ + { CCI_REG8(0x3819), 0x01 }, /* VSYNC_END_L vsync_end_point[7:0] = 0x01 */ + + /* OTP control */ + { CCI_REG8(0x3d85), 0x36 }, /* OTP_REG85 OTP_power_up_load_setting_enable = 1, + * OTP_power_up_load_data_enable = 1, + * OTP_bist_select = 1 (compare with zero) + */ + { CCI_REG8(0x3d8c), 0x71 }, /* OTP_SETTING_STT_ADDRESS_H */ + { CCI_REG8(0x3d8d), 0xcb }, /* OTP_SETTING_STT_ADDRESS_L */ + + /* BLC registers*/ + { CCI_REG8(0x4001), 0x40 }, /* DEBUG_MODE */ + { CCI_REG8(0x401b), 0x00 }, /* DEBUG_MODE */ + { CCI_REG8(0x401d), 0x00 }, /* DEBUG_MODE */ + { CCI_REG8(0x401f), 0x00 }, /* DEBUG_MODE */ + + /* ADC sync control */ + { CCI_REG8(0x4500), 0x6c }, /* ADC_SYNC_CTRL */ + { CCI_REG8(0x4503), 0x01 }, /* ADC_SYNC_CTRL */ + + /* Temperature monitor */ + { CCI_REG8(0x4d00), 0x04 }, /* TPM_CTRL_00 tmp_slope[15:8] = 0x04 */ + { CCI_REG8(0x4d01), 0x42 }, /* TPM_CTRL_01 tmp_slope[7:0] = 0x42 */ + { CCI_REG8(0x4d02), 0xd1 }, /* TPM_CTRL_02 tpm_offset[31:24] = 0xd1 */ + { CCI_REG8(0x4d03), 0x93 }, /* TPM_CTRL_03 tpm_offset[23:16] = 0x93 */ + { CCI_REG8(0x4d04), 0xf5 }, /* TPM_CTRL_04 tpm_offset[15:8] = 0xf5 */ + { CCI_REG8(0x4d05), 0xc1 }, /* TPM_CTRL_05 tpm_offset[7:0] = 0xc1 */ + + /* pre-ISP control */ + { CCI_REG8(0x5050), 0x0c }, /* DEBUG_MODE */ + + /* OTP-DPC control */ + { CCI_REG8(0x5501), 0x10 }, /* OTP_DPC_START_L otp_start_address[7:0] = 0x10 */ + { CCI_REG8(0x5503), 0x0f }, /* OTP_DPC_END_L otp_end_address[7:0] = 0x0f */ }; static const struct ov4689_mode supported_modes[] = { @@ -215,16 +261,13 @@ static const struct ov4689_mode supported_modes[] = { .id = OV4689_MODE_2688_1520, .width = 2688, .height = 1520, - .sensor_width = 2720, - .sensor_height = 1536, - .crop_top = 8, - .crop_left = 16, - .max_fps = 30, .exp_def = 1536, - .hts_def = 4 * 2574, + .hts_def = 10296, + .hts_min = 3432, .vts_def = 1554, .pixel_rate = 480000000, .reg_list = ov4689_2688x1520_regs, + .num_regs = ARRAY_SIZE(ov4689_2688x1520_regs), }, }; @@ -277,83 +320,6 @@ static const struct ov4689_gain_range ov4689_gain_ranges[] = { }, }; -/* Write registers up to 4 at a time */ -static int ov4689_write_reg(struct i2c_client *client, u16 reg, u32 len, - u32 val) -{ - u32 buf_i, val_i; - __be32 val_be; - u8 *val_p; - u8 buf[6]; - - if (len > 4) - return -EINVAL; - - buf[0] = reg >> 8; - buf[1] = reg & 0xff; - - val_be = cpu_to_be32(val); - val_p = (u8 *)&val_be; - buf_i = 2; - val_i = 4 - len; - - while (val_i < 4) - buf[buf_i++] = val_p[val_i++]; - - if (i2c_master_send(client, buf, len + 2) != len + 2) - return -EIO; - - return 0; -} - -static int ov4689_write_array(struct i2c_client *client, - const struct regval *regs) -{ - int ret = 0; - u32 i; - - for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) - ret = ov4689_write_reg(client, regs[i].addr, - OV4689_REG_VALUE_08BIT, regs[i].val); - - return ret; -} - -/* Read registers up to 4 at a time */ -static int ov4689_read_reg(struct i2c_client *client, u16 reg, unsigned int len, - u32 *val) -{ - __be16 reg_addr_be = cpu_to_be16(reg); - struct i2c_msg msgs[2]; - __be32 data_be = 0; - u8 *data_be_p; - int ret; - - if (len > 4 || !len) - return -EINVAL; - - data_be_p = (u8 *)&data_be; - /* Write register address */ - msgs[0].addr = client->addr; - msgs[0].flags = 0; - msgs[0].len = 2; - msgs[0].buf = (u8 *)®_addr_be; - - /* Read data from register */ - msgs[1].addr = client->addr; - msgs[1].flags = I2C_M_RD; - msgs[1].len = len; - msgs[1].buf = &data_be_p[4 - len]; - - ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); - if (ret != ARRAY_SIZE(msgs)) - return -EIO; - - *val = be32_to_cpu(data_be); - - return 0; -} - static void ov4689_fill_fmt(const struct ov4689_mode *mode, struct v4l2_mbus_framefmt *fmt) { @@ -376,19 +342,6 @@ static int ov4689_set_fmt(struct v4l2_subdev *sd, return 0; } -static int ov4689_get_fmt(struct v4l2_subdev *sd, - struct v4l2_subdev_state *sd_state, - struct v4l2_subdev_format *fmt) -{ - struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format; - struct ov4689 *ov4689 = to_ov4689(sd); - - /* only one mode supported for now */ - ov4689_fill_fmt(ov4689->cur_mode, mbus_fmt); - - return 0; -} - static int ov4689_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_mbus_code_enum *code) @@ -427,16 +380,14 @@ static int ov4689_enable_test_pattern(struct ov4689 *ov4689, u32 pattern) else val = OV4689_TEST_PATTERN_DISABLE; - return ov4689_write_reg(ov4689->client, OV4689_REG_TEST_PATTERN, - OV4689_REG_VALUE_08BIT, val); + return cci_write(ov4689->regmap, OV4689_REG_TEST_PATTERN, + val, NULL); } static int ov4689_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_state *state, struct v4l2_subdev_selection *sel) { - const struct ov4689_mode *mode = to_ov4689(sd)->cur_mode; - if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) return -EINVAL; @@ -444,63 +395,114 @@ static int ov4689_get_selection(struct v4l2_subdev *sd, case V4L2_SEL_TGT_CROP_BOUNDS: sel->r.top = 0; sel->r.left = 0; - sel->r.width = mode->sensor_width; - sel->r.height = mode->sensor_height; + sel->r.width = OV4689_PIXEL_ARRAY_WIDTH; + sel->r.height = OV4689_PIXEL_ARRAY_HEIGHT; return 0; case V4L2_SEL_TGT_CROP: case V4L2_SEL_TGT_CROP_DEFAULT: - sel->r.top = mode->crop_top; - sel->r.left = mode->crop_left; - sel->r.width = mode->width; - sel->r.height = mode->height; + sel->r.top = OV4689_DUMMY_ROWS; + sel->r.left = OV4689_DUMMY_COLUMNS; + sel->r.width = + OV4689_PIXEL_ARRAY_WIDTH - 2 * OV4689_DUMMY_COLUMNS; + sel->r.height = + OV4689_PIXEL_ARRAY_HEIGHT - 2 * OV4689_DUMMY_ROWS; return 0; } return -EINVAL; } +static int ov4689_setup_timings(struct ov4689 *ov4689) +{ + const struct ov4689_mode *mode = ov4689->cur_mode; + struct regmap *rm = ov4689->regmap; + int ret = 0; + + cci_write(rm, OV4689_REG_H_CROP_START, 8, &ret); + cci_write(rm, OV4689_REG_V_CROP_START, 8, &ret); + cci_write(rm, OV4689_REG_H_CROP_END, 2711, &ret); + cci_write(rm, OV4689_REG_V_CROP_END, 1531, &ret); + + cci_write(rm, OV4689_REG_H_OUTPUT_SIZE, mode->width, &ret); + cci_write(rm, OV4689_REG_V_OUTPUT_SIZE, mode->height, &ret); + + cci_write(rm, OV4689_REG_H_WIN_OFF, 8, &ret); + cci_write(rm, OV4689_REG_V_WIN_OFF, 4, &ret); + + cci_write(rm, OV4689_REG_VFIFO_CTRL_01, 167, &ret); + + return ret; +} + +static int ov4689_setup_blc_anchors(struct ov4689 *ov4689) +{ + struct regmap *rm = ov4689->regmap; + int ret = 0; + + cci_write(rm, OV4689_REG_ANCHOR_LEFT_START, 16, &ret); + cci_write(rm, OV4689_REG_ANCHOR_LEFT_END, 1999, &ret); + cci_write(rm, OV4689_REG_ANCHOR_RIGHT_START, 2400, &ret); + cci_write(rm, OV4689_REG_ANCHOR_RIGHT_END, 2415, &ret); + + return ret; +} + static int ov4689_s_stream(struct v4l2_subdev *sd, int on) { struct ov4689 *ov4689 = to_ov4689(sd); - struct i2c_client *client = ov4689->client; + struct v4l2_subdev_state *sd_state; + struct device *dev = ov4689->dev; int ret = 0; - mutex_lock(&ov4689->mutex); + sd_state = v4l2_subdev_lock_and_get_active_state(&ov4689->subdev); if (on) { - ret = pm_runtime_resume_and_get(&client->dev); + ret = pm_runtime_resume_and_get(dev); if (ret < 0) goto unlock_and_return; - ret = ov4689_write_array(ov4689->client, - ov4689->cur_mode->reg_list); + ret = cci_multi_reg_write(ov4689->regmap, + ov4689->cur_mode->reg_list, + ov4689->cur_mode->num_regs, + NULL); + if (ret) { + pm_runtime_put(dev); + goto unlock_and_return; + } + + ret = ov4689_setup_timings(ov4689); if (ret) { - pm_runtime_put(&client->dev); + pm_runtime_put(dev); + goto unlock_and_return; + } + + ret = ov4689_setup_blc_anchors(ov4689); + if (ret) { + pm_runtime_put(dev); goto unlock_and_return; } ret = __v4l2_ctrl_handler_setup(&ov4689->ctrl_handler); if (ret) { - pm_runtime_put(&client->dev); + pm_runtime_put(dev); goto unlock_and_return; } - ret = ov4689_write_reg(ov4689->client, OV4689_REG_CTRL_MODE, - OV4689_REG_VALUE_08BIT, - OV4689_MODE_STREAMING); + ret = cci_write(ov4689->regmap, OV4689_REG_CTRL_MODE, + OV4689_MODE_STREAMING, NULL); if (ret) { - pm_runtime_put(&client->dev); + pm_runtime_put(dev); goto unlock_and_return; } } else { - ov4689_write_reg(ov4689->client, OV4689_REG_CTRL_MODE, - OV4689_REG_VALUE_08BIT, - OV4689_MODE_SW_STANDBY); - pm_runtime_put(&client->dev); + cci_write(ov4689->regmap, OV4689_REG_CTRL_MODE, + OV4689_MODE_SW_STANDBY, NULL); + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); } unlock_and_return: - mutex_unlock(&ov4689->mutex); + v4l2_subdev_unlock_state(sd_state); return ret; } @@ -563,18 +565,13 @@ static int __maybe_unused ov4689_power_off(struct device *dev) return 0; } -static int ov4689_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) +static int ov4689_init_state(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state) { - struct ov4689 *ov4689 = to_ov4689(sd); - struct v4l2_mbus_framefmt *try_fmt; - - mutex_lock(&ov4689->mutex); - - try_fmt = v4l2_subdev_state_get_format(fh->state, 0); - /* Initialize try_fmt */ - ov4689_fill_fmt(&supported_modes[OV4689_MODE_2688_1520], try_fmt); + struct v4l2_mbus_framefmt *fmt = + v4l2_subdev_state_get_format(sd_state, 0); - mutex_unlock(&ov4689->mutex); + ov4689_fill_fmt(&supported_modes[OV4689_MODE_2688_1520], fmt); return 0; } @@ -583,10 +580,6 @@ static const struct dev_pm_ops ov4689_pm_ops = { SET_RUNTIME_PM_OPS(ov4689_power_off, ov4689_power_on, NULL) }; -static const struct v4l2_subdev_internal_ops ov4689_internal_ops = { - .open = ov4689_open, -}; - static const struct v4l2_subdev_video_ops ov4689_video_ops = { .s_stream = ov4689_s_stream, }; @@ -594,11 +587,15 @@ static const struct v4l2_subdev_video_ops ov4689_video_ops = { static const struct v4l2_subdev_pad_ops ov4689_pad_ops = { .enum_mbus_code = ov4689_enum_mbus_code, .enum_frame_size = ov4689_enum_frame_sizes, - .get_fmt = ov4689_get_fmt, + .get_fmt = v4l2_subdev_get_fmt, .set_fmt = ov4689_set_fmt, .get_selection = ov4689_get_selection, }; +static const struct v4l2_subdev_internal_ops ov4689_internal_ops = { + .init_state = ov4689_init_state, +}; + static const struct v4l2_subdev_ops ov4689_subdev_ops = { .video = &ov4689_video_ops, .pad = &ov4689_pad_ops, @@ -610,7 +607,6 @@ static const struct v4l2_subdev_ops ov4689_subdev_ops = { */ static int ov4689_map_gain(struct ov4689 *ov4689, int logical_gain, int *result) { - const struct device *dev = &ov4689->client->dev; const struct ov4689_gain_range *range; unsigned int n; @@ -621,7 +617,8 @@ static int ov4689_map_gain(struct ov4689 *ov4689, int logical_gain, int *result) } if (n == ARRAY_SIZE(ov4689_gain_ranges)) { - dev_warn_ratelimited(dev, "no mapping found for gain %d\n", + dev_warn_ratelimited(ov4689->dev, + "no mapping found for gain %d\n", logical_gain); return -EINVAL; } @@ -637,10 +634,11 @@ static int ov4689_set_ctrl(struct v4l2_ctrl *ctrl) { struct ov4689 *ov4689 = container_of(ctrl->handler, struct ov4689, ctrl_handler); - struct i2c_client *client = ov4689->client; - int sensor_gain; + struct regmap *regmap = ov4689->regmap; + struct device *dev = ov4689->dev; + int sensor_gain = 0; s64 max_expo; - int ret; + int ret = 0; /* Propagate change of current control to all related controls */ switch (ctrl->id) { @@ -654,44 +652,58 @@ static int ov4689_set_ctrl(struct v4l2_ctrl *ctrl) break; } - if (!pm_runtime_get_if_in_use(&client->dev)) + if (!pm_runtime_get_if_in_use(dev)) return 0; switch (ctrl->id) { case V4L2_CID_EXPOSURE: - /* 4 least significant bits of expsoure are fractional part */ - ret = ov4689_write_reg(ov4689->client, OV4689_REG_EXPOSURE, - OV4689_REG_VALUE_24BIT, ctrl->val << 4); + /* 4 least significant bits of exposure are fractional part */ + cci_write(regmap, OV4689_REG_EXPOSURE, ctrl->val << 4, &ret); break; case V4L2_CID_ANALOGUE_GAIN: ret = ov4689_map_gain(ov4689, ctrl->val, &sensor_gain); - - ret = ret ?: - ov4689_write_reg(ov4689->client, OV4689_REG_GAIN_H, - OV4689_REG_VALUE_08BIT, - (sensor_gain >> OV4689_GAIN_H_SHIFT) & - OV4689_GAIN_H_MASK); - ret = ret ?: - ov4689_write_reg(ov4689->client, OV4689_REG_GAIN_L, - OV4689_REG_VALUE_08BIT, - sensor_gain & OV4689_GAIN_L_MASK); + cci_write(regmap, OV4689_REG_GAIN, sensor_gain, &ret); break; case V4L2_CID_VBLANK: - ret = ov4689_write_reg(ov4689->client, OV4689_REG_VTS, - OV4689_REG_VALUE_16BIT, - ctrl->val + ov4689->cur_mode->height); + cci_write(regmap, OV4689_REG_VTS, + ctrl->val + ov4689->cur_mode->height, &ret); break; case V4L2_CID_TEST_PATTERN: ret = ov4689_enable_test_pattern(ov4689, ctrl->val); break; + case V4L2_CID_HBLANK: + cci_write(regmap, OV4689_REG_HTS, + (ctrl->val + ov4689->cur_mode->width) / + OV4689_HTS_DIVIDER, &ret); + break; + case V4L2_CID_VFLIP: + cci_update_bits(regmap, OV4689_REG_TIMING_FORMAT1, + OV4689_TIMING_FLIP_MASK, + ctrl->val ? OV4689_TIMING_FLIP_BOTH : 0, &ret); + break; + case V4L2_CID_HFLIP: + cci_update_bits(regmap, OV4689_REG_TIMING_FORMAT2, + OV4689_TIMING_FLIP_MASK, + ctrl->val ? 0 : OV4689_TIMING_FLIP_BOTH, &ret); + break; + case V4L2_CID_DIGITAL_GAIN: + cci_write(regmap, OV4689_REG_DIG_GAIN, ctrl->val, &ret); + break; + case V4L2_CID_RED_BALANCE: + cci_write(regmap, OV4689_REG_WB_GAIN_RED, ctrl->val, &ret); + break; + case V4L2_CID_BLUE_BALANCE: + cci_write(regmap, OV4689_REG_WB_GAIN_BLUE, ctrl->val, &ret); + break; default: - dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n", + dev_warn(dev, "%s Unhandled id:0x%x, val:0x%x\n", __func__, ctrl->id, ctrl->val); ret = -EINVAL; break; } - pm_runtime_put(&client->dev); + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); return ret; } @@ -707,16 +719,15 @@ static int ov4689_initialize_controls(struct ov4689 *ov4689) struct v4l2_ctrl_handler *handler; const struct ov4689_mode *mode; s64 exposure_max, vblank_def; + s64 hblank_def, hblank_min; struct v4l2_ctrl *ctrl; - s64 h_blank_def; int ret; handler = &ov4689->ctrl_handler; mode = ov4689->cur_mode; - ret = v4l2_ctrl_handler_init(handler, 10); + ret = v4l2_ctrl_handler_init(handler, 15); if (ret) return ret; - handler->lock = &ov4689->mutex; ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ, 0, 0, link_freq_menu_items); @@ -726,11 +737,11 @@ static int ov4689_initialize_controls(struct ov4689 *ov4689) v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, 0, mode->pixel_rate, 1, mode->pixel_rate); - h_blank_def = mode->hts_def - mode->width; - ctrl = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK, h_blank_def, - h_blank_def, 1, h_blank_def); - if (ctrl) - ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; + hblank_def = mode->hts_def - mode->width; + hblank_min = mode->hts_min - mode->width; + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_HBLANK, + hblank_min, OV4689_HTS_MAX - mode->width, + OV4689_HTS_DIVIDER, hblank_def); vblank_def = mode->vts_def - mode->height; v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_VBLANK, @@ -754,10 +765,24 @@ static int ov4689_initialize_controls(struct ov4689 *ov4689) ARRAY_SIZE(ov4689_test_pattern_menu) - 1, 0, 0, ov4689_test_pattern_menu); + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); + + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_DIGITAL_GAIN, + OV4689_DIG_GAIN_MIN, OV4689_DIG_GAIN_MAX, + OV4689_DIG_GAIN_STEP, OV4689_DIG_GAIN_DEFAULT); + + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_RED_BALANCE, + OV4689_WB_GAIN_MIN, OV4689_WB_GAIN_MAX, + OV4689_WB_GAIN_STEP, OV4689_WB_GAIN_DEFAULT); + + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_BLUE_BALANCE, + OV4689_WB_GAIN_MIN, OV4689_WB_GAIN_MAX, + OV4689_WB_GAIN_STEP, OV4689_WB_GAIN_DEFAULT); + if (handler->error) { ret = handler->error; - dev_err(&ov4689->client->dev, "Failed to init controls(%d)\n", - ret); + dev_err(ov4689->dev, "Failed to init controls(%d)\n", ret); goto err_free_handler; } @@ -783,19 +808,18 @@ err_free_handler: static int ov4689_check_sensor_id(struct ov4689 *ov4689, struct i2c_client *client) { - struct device *dev = &ov4689->client->dev; - u32 id = 0; + struct device *dev = ov4689->dev; + u64 id = 0; int ret; - ret = ov4689_read_reg(client, OV4689_REG_CHIP_ID, - OV4689_REG_VALUE_16BIT, &id); + ret = cci_read(ov4689->regmap, OV4689_REG_CHIP_ID, &id, NULL); if (ret) { dev_err(dev, "Cannot read sensor ID\n"); return ret; } if (id != CHIP_ID) { - dev_err(dev, "Unexpected sensor ID %06x, expected %06x\n", + dev_err(dev, "Unexpected sensor ID %06llx, expected %06x\n", id, CHIP_ID); return -ENODEV; } @@ -812,7 +836,7 @@ static int ov4689_configure_regulators(struct ov4689 *ov4689) for (i = 0; i < ARRAY_SIZE(ov4689_supply_names); i++) ov4689->supplies[i].supply = ov4689_supply_names[i]; - return devm_regulator_bulk_get(&ov4689->client->dev, + return devm_regulator_bulk_get(ov4689->dev, ARRAY_SIZE(ov4689_supply_names), ov4689->supplies); } @@ -881,7 +905,8 @@ static int ov4689_probe(struct i2c_client *client) if (!ov4689) return -ENOMEM; - ov4689->client = client; + ov4689->dev = dev; + ov4689->cur_mode = &supported_modes[OV4689_MODE_2688_1520]; ov4689->xvclk = devm_clk_get_optional(dev, NULL); @@ -905,6 +930,13 @@ static int ov4689_probe(struct i2c_client *client) return -EINVAL; } + ov4689->regmap = devm_cci_regmap_init_i2c(client, 16); + if (IS_ERR(ov4689->regmap)) { + ret = PTR_ERR(ov4689->regmap); + dev_err(dev, "failed to initialize CCI: %d\n", ret); + return ret; + } + ov4689->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(ov4689->reset_gpio)) { @@ -923,13 +955,15 @@ static int ov4689_probe(struct i2c_client *client) return dev_err_probe(dev, ret, "Failed to get power regulators\n"); - mutex_init(&ov4689->mutex); - sd = &ov4689->subdev; v4l2_i2c_subdev_init(sd, client, &ov4689_subdev_ops); + sd->internal_ops = &ov4689_internal_ops; + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; ret = ov4689_initialize_controls(ov4689); - if (ret) - goto err_destroy_mutex; + if (ret) { + dev_err(dev, "Failed to initialize controls\n"); + return ret; + } ret = ov4689_power_on(dev); if (ret) @@ -939,35 +973,47 @@ static int ov4689_probe(struct i2c_client *client) if (ret) goto err_power_off; - sd->internal_ops = &ov4689_internal_ops; - sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; - ov4689->pad.flags = MEDIA_PAD_FL_SOURCE; sd->entity.function = MEDIA_ENT_F_CAM_SENSOR; + ov4689->pad.flags = MEDIA_PAD_FL_SOURCE; ret = media_entity_pads_init(&sd->entity, 1, &ov4689->pad); if (ret < 0) goto err_power_off; - ret = v4l2_async_register_subdev_sensor(sd); + sd->state_lock = ov4689->ctrl_handler.lock; + ret = v4l2_subdev_init_finalize(sd); if (ret) { - dev_err(dev, "v4l2 async register subdev failed\n"); + dev_err(dev, "Could not register v4l2 device\n"); goto err_clean_entity; } pm_runtime_set_active(dev); + pm_runtime_get_noresume(dev); pm_runtime_enable(dev); - pm_runtime_idle(dev); + pm_runtime_set_autosuspend_delay(dev, 1000); + pm_runtime_use_autosuspend(dev); + + ret = v4l2_async_register_subdev_sensor(sd); + if (ret) { + dev_err(dev, "v4l2 async register subdev failed\n"); + goto err_clean_subdev_pm; + } + + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); return 0; +err_clean_subdev_pm: + pm_runtime_disable(dev); + pm_runtime_put_noidle(dev); + v4l2_subdev_cleanup(sd); err_clean_entity: media_entity_cleanup(&sd->entity); err_power_off: ov4689_power_off(dev); err_free_handler: v4l2_ctrl_handler_free(&ov4689->ctrl_handler); -err_destroy_mutex: - mutex_destroy(&ov4689->mutex); return ret; } @@ -979,9 +1025,8 @@ static void ov4689_remove(struct i2c_client *client) v4l2_async_unregister_subdev(sd); media_entity_cleanup(&sd->entity); - + v4l2_subdev_cleanup(sd); v4l2_ctrl_handler_free(&ov4689->ctrl_handler); - mutex_destroy(&ov4689->mutex); pm_runtime_disable(&client->dev); if (!pm_runtime_status_suspended(&client->dev)) diff --git a/drivers/media/i2c/rdacm20.c b/drivers/media/i2c/rdacm20.c index b4647bda8c21..b8bd8354d100 100644 --- a/drivers/media/i2c/rdacm20.c +++ b/drivers/media/i2c/rdacm20.c @@ -463,8 +463,8 @@ static int rdacm20_initialize(struct rdacm20_device *dev) return ret; /* - * Ensure that we have a good link configuration before attempting to - * identify the device. + * Ensure that we have a good link configuration before attempting to + * identify the device. */ ret = max9271_configure_i2c(&dev->serializer, MAX9271_I2CSLVSH_469NS_234NS | diff --git a/drivers/media/i2c/st-mipid02.c b/drivers/media/i2c/st-mipid02.c index f250640729ca..b947a55281f0 100644 --- a/drivers/media/i2c/st-mipid02.c +++ b/drivers/media/i2c/st-mipid02.c @@ -326,7 +326,7 @@ static int mipid02_configure_from_rx_speed(struct mipid02_dev *bridge, } dev_dbg(&client->dev, "detect link_freq = %lld Hz", link_freq); - do_div(ui_4, link_freq); + ui_4 = div64_u64(ui_4, link_freq); bridge->r.clk_lane_reg1 |= ui_4 << 2; return 0; diff --git a/drivers/media/i2c/tc358743.c b/drivers/media/i2c/tc358743.c index 3192a334aaab..0307fee3cce9 100644 --- a/drivers/media/i2c/tc358743.c +++ b/drivers/media/i2c/tc358743.c @@ -1521,11 +1521,14 @@ static int tc358743_g_input_status(struct v4l2_subdev *sd, u32 *status) return 0; } -static int tc358743_s_dv_timings(struct v4l2_subdev *sd, +static int tc358743_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct tc358743_state *state = to_state(sd); + if (pad != 0) + return -EINVAL; + if (!timings) return -EINVAL; @@ -1553,11 +1556,14 @@ static int tc358743_s_dv_timings(struct v4l2_subdev *sd, return 0; } -static int tc358743_g_dv_timings(struct v4l2_subdev *sd, +static int tc358743_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct tc358743_state *state = to_state(sd); + if (pad != 0) + return -EINVAL; + *timings = state->timings; return 0; @@ -1573,11 +1579,14 @@ static int tc358743_enum_dv_timings(struct v4l2_subdev *sd, &tc358743_timings_cap, NULL, NULL); } -static int tc358743_query_dv_timings(struct v4l2_subdev *sd, - struct v4l2_dv_timings *timings) +static int tc358743_query_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *timings) { int ret; + if (pad != 0) + return -EINVAL; + ret = tc358743_get_detected_timings(sd, timings); if (ret) return ret; @@ -1822,9 +1831,6 @@ static const struct v4l2_subdev_core_ops tc358743_core_ops = { static const struct v4l2_subdev_video_ops tc358743_video_ops = { .g_input_status = tc358743_g_input_status, - .s_dv_timings = tc358743_s_dv_timings, - .g_dv_timings = tc358743_g_dv_timings, - .query_dv_timings = tc358743_query_dv_timings, .s_stream = tc358743_s_stream, }; @@ -1834,6 +1840,9 @@ static const struct v4l2_subdev_pad_ops tc358743_pad_ops = { .get_fmt = tc358743_get_fmt, .get_edid = tc358743_g_edid, .set_edid = tc358743_s_edid, + .s_dv_timings = tc358743_s_dv_timings, + .g_dv_timings = tc358743_g_dv_timings, + .query_dv_timings = tc358743_query_dv_timings, .enum_dv_timings = tc358743_enum_dv_timings, .dv_timings_cap = tc358743_dv_timings_cap, .get_mbus_config = tc358743_get_mbus_config, @@ -2110,7 +2119,7 @@ static int tc358743_probe(struct i2c_client *client) tc358743_initial_setup(sd); - tc358743_s_dv_timings(sd, &default_timing); + tc358743_s_dv_timings(sd, 0, &default_timing); tc358743_set_csi_color_space(sd); diff --git a/drivers/media/i2c/tc358746.c b/drivers/media/i2c/tc358746.c index d676adc4401b..edf79107adc5 100644 --- a/drivers/media/i2c/tc358746.c +++ b/drivers/media/i2c/tc358746.c @@ -844,8 +844,7 @@ static unsigned long tc358746_find_pll_settings(struct tc358746 *tc358746, continue; tmp = fout * postdiv; - do_div(tmp, fin); - mul = tmp; + mul = div64_ul(tmp, fin); if (mul > 511) continue; diff --git a/drivers/media/i2c/tda1997x.c b/drivers/media/i2c/tda1997x.c index 8e4a0718c4b6..58ce8fec3041 100644 --- a/drivers/media/i2c/tda1997x.c +++ b/drivers/media/i2c/tda1997x.c @@ -1669,8 +1669,8 @@ tda1997x_g_input_status(struct v4l2_subdev *sd, u32 *status) return 0; }; -static int tda1997x_s_dv_timings(struct v4l2_subdev *sd, - struct v4l2_dv_timings *timings) +static int tda1997x_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *timings) { struct tda1997x_state *state = to_state(sd); @@ -1694,7 +1694,7 @@ static int tda1997x_s_dv_timings(struct v4l2_subdev *sd, return 0; } -static int tda1997x_g_dv_timings(struct v4l2_subdev *sd, +static int tda1997x_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct tda1997x_state *state = to_state(sd); @@ -1707,7 +1707,7 @@ static int tda1997x_g_dv_timings(struct v4l2_subdev *sd, return 0; } -static int tda1997x_query_dv_timings(struct v4l2_subdev *sd, +static int tda1997x_query_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct tda1997x_state *state = to_state(sd); @@ -1724,9 +1724,6 @@ static int tda1997x_query_dv_timings(struct v4l2_subdev *sd, static const struct v4l2_subdev_video_ops tda1997x_video_ops = { .g_input_status = tda1997x_g_input_status, - .s_dv_timings = tda1997x_s_dv_timings, - .g_dv_timings = tda1997x_g_dv_timings, - .query_dv_timings = tda1997x_query_dv_timings, }; @@ -1930,6 +1927,9 @@ static const struct v4l2_subdev_pad_ops tda1997x_pad_ops = { .set_fmt = tda1997x_set_format, .get_edid = tda1997x_get_edid, .set_edid = tda1997x_set_edid, + .s_dv_timings = tda1997x_s_dv_timings, + .g_dv_timings = tda1997x_g_dv_timings, + .query_dv_timings = tda1997x_query_dv_timings, .dv_timings_cap = tda1997x_get_dv_timings_cap, .enum_dv_timings = tda1997x_enum_dv_timings, }; diff --git a/drivers/media/i2c/ths7303.c b/drivers/media/i2c/ths7303.c index ea70c1c13872..49ed83a0ac94 100644 --- a/drivers/media/i2c/ths7303.c +++ b/drivers/media/i2c/ths7303.c @@ -193,8 +193,8 @@ static int ths7303_s_stream(struct v4l2_subdev *sd, int enable) } /* for setting filter for HD output */ -static int ths7303_s_dv_timings(struct v4l2_subdev *sd, - struct v4l2_dv_timings *dv_timings) +static int ths7303_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *dv_timings) { struct ths7303_state *state = to_state(sd); @@ -210,7 +210,6 @@ static int ths7303_s_dv_timings(struct v4l2_subdev *sd, static const struct v4l2_subdev_video_ops ths7303_video_ops = { .s_stream = ths7303_s_stream, .s_std_output = ths7303_s_std_output, - .s_dv_timings = ths7303_s_dv_timings, }; #ifdef CONFIG_VIDEO_ADV_DEBUG @@ -317,9 +316,14 @@ static const struct v4l2_subdev_core_ops ths7303_core_ops = { #endif }; +static const struct v4l2_subdev_pad_ops ths7303_pad_ops = { + .s_dv_timings = ths7303_s_dv_timings, +}; + static const struct v4l2_subdev_ops ths7303_ops = { .core = &ths7303_core_ops, .video = &ths7303_video_ops, + .pad = &ths7303_pad_ops, }; static int ths7303_probe(struct i2c_client *client) diff --git a/drivers/media/i2c/ths8200.c b/drivers/media/i2c/ths8200.c index 0e0f676cd221..ce0a7f809f19 100644 --- a/drivers/media/i2c/ths8200.c +++ b/drivers/media/i2c/ths8200.c @@ -358,13 +358,16 @@ static void ths8200_setup(struct v4l2_subdev *sd, struct v4l2_bt_timings *bt) bt->hsync, bt->vsync); } -static int ths8200_s_dv_timings(struct v4l2_subdev *sd, +static int ths8200_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct ths8200_state *state = to_state(sd); v4l2_dbg(1, debug, sd, "%s:\n", __func__); + if (pad != 0) + return -EINVAL; + if (!v4l2_valid_dv_timings(timings, &ths8200_timings_cap, NULL, NULL)) return -EINVAL; @@ -385,13 +388,16 @@ static int ths8200_s_dv_timings(struct v4l2_subdev *sd, return 0; } -static int ths8200_g_dv_timings(struct v4l2_subdev *sd, +static int ths8200_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, struct v4l2_dv_timings *timings) { struct ths8200_state *state = to_state(sd); v4l2_dbg(1, debug, sd, "%s:\n", __func__); + if (pad != 0) + return -EINVAL; + *timings = state->dv_timings; return 0; @@ -420,11 +426,11 @@ static int ths8200_dv_timings_cap(struct v4l2_subdev *sd, /* Specific video subsystem operation handlers */ static const struct v4l2_subdev_video_ops ths8200_video_ops = { .s_stream = ths8200_s_stream, - .s_dv_timings = ths8200_s_dv_timings, - .g_dv_timings = ths8200_g_dv_timings, }; static const struct v4l2_subdev_pad_ops ths8200_pad_ops = { + .s_dv_timings = ths8200_s_dv_timings, + .g_dv_timings = ths8200_g_dv_timings, .enum_dv_timings = ths8200_enum_dv_timings, .dv_timings_cap = ths8200_dv_timings_cap, }; diff --git a/drivers/media/i2c/tvp7002.c b/drivers/media/i2c/tvp7002.c index 6a04ffae5343..ea01bd86450e 100644 --- a/drivers/media/i2c/tvp7002.c +++ b/drivers/media/i2c/tvp7002.c @@ -546,13 +546,16 @@ static int tvp7002_write_inittab(struct v4l2_subdev *sd, return error; } -static int tvp7002_s_dv_timings(struct v4l2_subdev *sd, - struct v4l2_dv_timings *dv_timings) +static int tvp7002_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *dv_timings) { struct tvp7002 *device = to_tvp7002(sd); const struct v4l2_bt_timings *bt = &dv_timings->bt; int i; + if (pad != 0) + return -EINVAL; + if (dv_timings->type != V4L2_DV_BT_656_1120) return -EINVAL; for (i = 0; i < NUM_TIMINGS; i++) { @@ -566,11 +569,14 @@ static int tvp7002_s_dv_timings(struct v4l2_subdev *sd, return -EINVAL; } -static int tvp7002_g_dv_timings(struct v4l2_subdev *sd, - struct v4l2_dv_timings *dv_timings) +static int tvp7002_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *dv_timings) { struct tvp7002 *device = to_tvp7002(sd); + if (pad != 0) + return -EINVAL; + *dv_timings = device->current_timings->timings; return 0; } @@ -659,12 +665,16 @@ static int tvp7002_query_dv(struct v4l2_subdev *sd, int *index) return 0; } -static int tvp7002_query_dv_timings(struct v4l2_subdev *sd, - struct v4l2_dv_timings *timings) +static int tvp7002_query_dv_timings(struct v4l2_subdev *sd, unsigned int pad, + struct v4l2_dv_timings *timings) { int index; - int err = tvp7002_query_dv(sd, &index); + int err; + + if (pad != 0) + return -EINVAL; + err = tvp7002_query_dv(sd, &index); if (err) return err; *timings = tvp7002_timings[index].timings; @@ -861,9 +871,6 @@ static const struct v4l2_subdev_core_ops tvp7002_core_ops = { /* Specific video subsystem operation handlers */ static const struct v4l2_subdev_video_ops tvp7002_video_ops = { - .g_dv_timings = tvp7002_g_dv_timings, - .s_dv_timings = tvp7002_s_dv_timings, - .query_dv_timings = tvp7002_query_dv_timings, .s_stream = tvp7002_s_stream, }; @@ -872,6 +879,9 @@ static const struct v4l2_subdev_pad_ops tvp7002_pad_ops = { .enum_mbus_code = tvp7002_enum_mbus_code, .get_fmt = tvp7002_get_pad_format, .set_fmt = tvp7002_set_pad_format, + .g_dv_timings = tvp7002_g_dv_timings, + .s_dv_timings = tvp7002_s_dv_timings, + .query_dv_timings = tvp7002_query_dv_timings, .enum_dv_timings = tvp7002_enum_dv_timings, }; @@ -1001,7 +1011,7 @@ static int tvp7002_probe(struct i2c_client *c) /* Set registers according to default video mode */ timings = device->current_timings->timings; - error = tvp7002_s_dv_timings(sd, &timings); + error = tvp7002_s_dv_timings(sd, 0, &timings); #if defined(CONFIG_MEDIA_CONTROLLER) device->pad.flags = MEDIA_PAD_FL_SOURCE; |