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* dt-bindings: qcom_spmi: Document SAW supportIlia Lin2018-05-241-0/+45
| | | | | | | | | | | | | Document the DT bindings for the SAW regulators. The saw-leader is the only property that is configurable in DT. The saw-slave property allows ganging (grouping) of several regulators so that their outputs can be combined. Signed-off-by: Ilia Lin <ilialin@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* regulator: bindings: Add properties for coupled regulatorsMaciej Purski2018-05-171-0/+5
| | | | | | | | | | | Some regulators require keeping their voltage spread below defined max_spread. Add properties to provide information on regulators' coupling. Signed-off-by: Maciej Purski <m.purski@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* regulator: of: add property for allowed modes specificationDavid Collins2018-05-171-0/+5
| | | | | | | | Add a common device tree property for regulator nodes to support the specification of allowed operating modes. Signed-off-by: David Collins <collinsd@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* regulator: add binding for the SY8106A voltage regulatorOndrej Jirman2018-05-091-0/+23
| | | | | | | | | | | | | | SY8106A is an I2C-controlled adjustable voltage regulator made by Silergy Corp. Add its device tree binding. Signed-off-by: Ondrej Jirman <megous@megous.com> [Icenowy: Change commit message and slight fixes] Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* regulator: pfuze100: Make the node name genericFabio Estevam2018-05-051-3/+3
| | | | | | | | | | | | According to Devicetree Specification v0.2 document: "The name of a node should be somewhat generic, reflecting the function of the device and not its precise programming model." Do as suggested in the binding example. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge branch 'topic/bd9571mwv' of ↵Mark Brown2018-05-021-0/+21
|\ | | | | | | https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator into regulator-4.18
| * dt-bindings: mfd: bd9571mwv: Document DDR Backup Mode propertiesGeert Uytterhoeven2018-04-231-0/+21
| | | | | | | | | | | | | | | | | | | | Document the new optional properties related to DDR Backup Mode and toggle/momentary power switches. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* | regulator: axp20x: add drivevbus support for axp803Jagan Teki2018-04-231-1/+2
|/ | | | | | | | | | | | Like axp221, axp223, axp813 the axp803 is also supporting external regulator to drive the OTG VBus through N_VBUSEN PMIC pin. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds2018-04-152-3/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Thomas Gleixner: "A set of fixes and updates for x86: - Address a swiotlb regression which was caused by the recent DMA rework and made driver fail because dma_direct_supported() returned false - Fix a signedness bug in the APIC ID validation which caused invalid APIC IDs to be detected as valid thereby bloating the CPU possible space. - Fix inconsisten config dependcy/select magic for the MFD_CS5535 driver. - Fix a corruption of the physical address space bits when encryption has reduced the address space and late cpuinfo updates overwrite the reduced bit information with the original value. - Dominiks syscall rework which consolidates the architecture specific syscall functions so all syscalls can be wrapped with the same macros. This allows to switch x86/64 to struct pt_regs based syscalls. Extend the clearing of user space controlled registers in the entry patch to the lower registers" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/apic: Fix signedness bug in APIC ID validity checks x86/cpu: Prevent cpuinfo_x86::x86_phys_bits adjustment corruption x86/olpc: Fix inconsistent MFD_CS5535 configuration swiotlb: Use dma_direct_supported() for swiotlb_ops syscalls/x86: Adapt syscall_wrapper.h to the new syscall stub naming convention syscalls/core, syscalls/x86: Rename struct pt_regs-based sys_*() to __x64_sys_*() syscalls/core, syscalls/x86: Clean up compat syscall stub naming convention syscalls/core, syscalls/x86: Clean up syscall stub naming convention syscalls/x86: Extend register clearing on syscall entry to lower registers syscalls/x86: Unconditionally enable 'struct pt_regs' based syscalls on x86_64 syscalls/x86: Use 'struct pt_regs' based syscall calling for IA32_EMULATION and x32 syscalls/core: Prepare CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y for compat syscalls syscalls/x86: Use 'struct pt_regs' based syscall calling convention for 64-bit syscalls syscalls/core: Introduce CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y x86/syscalls: Don't pointlessly reload the system call number x86/mm: Fix documentation of module mapping range with 4-level paging x86/cpuid: Switch to 'static const' specifier
| * Merge branch 'WIP.x86/asm' into x86/urgent, because the topic is readyIngo Molnar2018-04-12131-3139/+1132
| |\ | | | | | | | | | Signed-off-by: Ingo Molnar <mingo@kernel.org>
| | * syscalls/core, syscalls/x86: Clean up compat syscall stub naming conventionDominik Brodowski2018-04-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tidy the naming convention for compat syscall subs. Hints which describe the purpose of the stub go in front and receive a double underscore to denote that they are generated on-the-fly by the COMPAT_SYSCALL_DEFINEx() macro. For the generic case, this means: t kernel_waitid # common C function (see kernel/exit.c) __do_compat_sys_waitid # inlined helper doing the actual work # (takes original parameters as declared) T __se_compat_sys_waitid # sign-extending C function calling inlined # helper (takes parameters of type long, # casts them to unsigned long and then to # the declared type) T compat_sys_waitid # alias to __se_compat_sys_waitid() # (taking parameters as declared), to # be included in syscall table For x86, the naming is as follows: t kernel_waitid # common C function (see kernel/exit.c) __do_compat_sys_waitid # inlined helper doing the actual work # (takes original parameters as declared) t __se_compat_sys_waitid # sign-extending C function calling inlined # helper (takes parameters of type long, # casts them to unsigned long and then to # the declared type) T __ia32_compat_sys_waitid # IA32_EMULATION 32-bit-ptregs -> C stub, # calls __se_compat_sys_waitid(); to be # included in syscall table T __x32_compat_sys_waitid # x32 64-bit-ptregs -> C stub, calls # __se_compat_sys_waitid(); to be included # in syscall table If only one of IA32_EMULATION and x32 is enabled, __se_compat_sys_waitid() may be inlined into the stub __{ia32,x32}_compat_sys_waitid(). Suggested-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20180409105145.5364-3-linux@dominikbrodowski.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
| * | x86/mm: Fix documentation of module mapping range with 4-level pagingKirill A. Shutemov2018-04-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit: f5a40711fa58 ("x86/mm: Set MODULES_END to 0xffffffffff000000") changed MODULES_END back to a fixed value, but didn't update the documentation of memory layout for 4-level paging. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Acked-by: Andrey Ryabinin <aryabinin@virtuozzo.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Fixes: f5a40711fa58 ("x86/mm: Set MODULES_END to 0xffffffffff000000") Link: http://lkml.kernel.org/r/20180402121025.10244-1-kirill.shutemov@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
* | | Merge branch 'overlayfs-linus' of ↵Linus Torvalds2018-04-131-6/+33
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs Pull overlayfs updates from Miklos Szeredi: "In addition to bug fixes and cleanups there are two new features from Amir: - Consistent inode number support for the case when layers are not all on the same filesystem (feature is dubbed "xino"). - Optimize overlayfs file handle decoding. This one touches the exportfs interface to allow detecting the disconnected directory case" * 'overlayfs-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs: ovl: update documentation w.r.t "xino" feature ovl: add support for "xino" mount and config options ovl: consistent d_ino for non-samefs with xino ovl: consistent i_ino for non-samefs with xino ovl: constant st_ino for non-samefs with xino ovl: allocate anon bdev per unique lower fs ovl: factor out ovl_map_dev_ino() helper ovl: cleanup ovl_update_time() ovl: add WARN_ON() for non-dir redirect cases ovl: cleanup setting OVL_INDEX ovl: set d->is_dir and d->opaque for last path element ovl: Do not check for redirect if this is last layer ovl: lookup in inode cache first when decoding lower file handle ovl: do not try to reconnect a disconnected origin dentry ovl: disambiguate ovl_encode_fh() ovl: set lower layer st_dev only if setting lower st_ino ovl: fix lookup with middle layer opaque dir and absolute path redirects ovl: Set d->last properly during lookup ovl: set i_ino to the value of st_ino for NFS export
| * | | ovl: update documentation w.r.t "xino" featureAmir Goldstein2018-04-121-6/+33
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Amir Goldstein <amir73il@gmail.com> Signed-off-by: Miklos Szeredi <mszeredi@redhat.com>
* | | | Merge branch 'next' of ↵Linus Torvalds2018-04-131-0/+31
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux Pull thermal management update from Zhang Rui: - Fix race condition in imx_thermal_probe() (Mikhail Lappo) - Add cooling device's statistics in sysfs (Viresh Kumar) * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: thermal: Add cooling device's statistics in sysfs thermal: imx: Fix race condition in imx_thermal_probe()
| * | | | thermal: Add cooling device's statistics in sysfsViresh Kumar2018-04-021-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This extends the sysfs interface for thermal cooling devices and exposes some pretty useful statistics. These statistics have proven to be quite useful specially while doing benchmarks related to the task scheduler, where we want to make sure that nothing has disrupted the test, specially the cooling device which may have put constraints on the CPUs. The information exposed here tells us to what extent the CPUs were constrained by the thermal framework. The write-only "reset" file is used to reset the statistics. The read-only "time_in_state_ms" file shows the time (in msec) spent by the device in the respective cooling states, and it prints one line per cooling state. The read-only "total_trans" file shows single positive integer value showing the total number of cooling state transitions the device has gone through since the time the cooling device is registered or the time when statistics were reset last. The read-only "trans_table" file shows a two dimensional matrix, where an entry <i,j> (row i, column j) represents the number of transitions from State_i to State_j. This is how the directory structure looks like for a single cooling device: $ ls -R /sys/class/thermal/cooling_device0/ /sys/class/thermal/cooling_device0/: cur_state max_state power stats subsystem type uevent /sys/class/thermal/cooling_device0/power: autosuspend_delay_ms runtime_active_time runtime_suspended_time control runtime_status /sys/class/thermal/cooling_device0/stats: reset time_in_state_ms total_trans trans_table This is tested on ARM 64-bit Hisilicon hikey620 board running Ubuntu and ARM 64-bit Hisilicon hikey960 board running Android. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
* | | | | Merge tag 'clk-for-linus' of ↵Linus Torvalds2018-04-1314-10/+444
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "The large diff this time around is from the addition of a new clk driver for the TI Davinci family of SoCs. So far those clks have been supported with a custom implementation of the clk API in the arch port instead of in the CCF. With this driver merged we're one step closer to having a single clk API implementation. The other large diff is from the Amlogic clk driver that underwent some major surgery to use regmap. Beyond that, the biggest hitter is Samsung which needed some reworks to properly handle clk provider power domains and a bunch of PLL rate updates. The core framework was fairly quiet this round, just getting some cleanups and small fixes for some of the more esoteric features. And the usual set of driver non-critical fixes, cleanups, and minor additions are here as well. Core: - Rejig clk_ops::init() to be a little earlier for phase/accuracy ops - debugfs ops macroized to shave some lines of boilerplate code - Always calculate the phase instead of caching it in clk_get_phase() - More __must_check on bulk clk APIs New Drivers: - TI's Davinci family of SoCs - Intel's Stratix10 SoC - stm32mp157 SoC - Allwinner H6 CCU - Silicon Labs SI544 clock generator chip - Renesas R-Car M3-N and V3H SoCs - i.MX6SLL SoCs Removed Drivers: - ST-Ericsson AB8540/9540 Updates: - Mediatek MT2701 and MT7622 audsys support and MT2712 updates - STM32F469 DSI and STM32F769 sdmmc2 support - GPIO clks can sleep now - Spreadtrum SC9860 RTC clks - Nvidia Tegra MBIST workarounds and various minor fixes - Rockchip phase handling fixes and a memory leak plugged - Renesas drivers switch to readl/writel from clk_readl/clk_writel - Renesas gained CPU (Z/Z2) and watchdog support - Rockchip rk3328 display clks and rk3399 1.6GHz PLL support - Qualcomm PM8921 PMIC XO buffers - Amlogic migrates to regmap APIs - TI Keystone clk latching support - Allwinner H3 and H5 video clk fixes - Broadcom BCM2835 PLLs needed another bit to enable - i.MX6SX CKO mux fix and i.MX7D Video PLL divider fix - i.MX6UL/ULL epdc_podf support - Hi3798CV200 COMBPHY0 and USB2_OTG_UTMI and phase support for eMMC" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (233 commits) clk: davinci: add a reset lookup table for psc0 clk: imx: add clock driver for imx6sll dt-bindings: imx: update clock doc for imx6sll clk: imx: add new gate/gate2 wrapper funtion clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux clk: cs2000: set pm_ops in hibernate-compatible way clk: bcm2835: De-assert/assert PLL reset signal when appropriate clk: imx7d: Move clks_init_on before any clock operations clk: imx7d: Correct ahb clk parent select clk: imx7d: Correct dram pll type clk: imx7d: Add USB clock information clk: socfpga: stratix10: add clock driver for Stratix10 platform dt-bindings: documentation: add clock bindings information for Stratix10 clk: ti: fix flag space conflict with clkctrl clocks clk: uniphier: add additional ethernet clock lines for Pro4 clk: uniphier: add SATA clock control support clk: uniphier: add PCIe clock control support clk: Add driver for the si544 clock generator chip clk: davinci: Remove redundant dev_err calls clk: uniphier: add ethernet clock control support for PXs3 ...
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| *---. \ \ \ \ Merge branches 'clk-stratix10', 'clk-imx', 'clk-bcm', 'clk-cs2000' and ↵Stephen Boyd2018-04-062-0/+56
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-imx6sll' into clk-next * clk-stratix10: clk: socfpga: stratix10: add clock driver for Stratix10 platform dt-bindings: documentation: add clock bindings information for Stratix10 * clk-imx: clk: imx7d: Move clks_init_on before any clock operations clk: imx7d: Correct ahb clk parent select clk: imx7d: Correct dram pll type clk: imx7d: Add USB clock information clk: imx: pllv2: avoid using uninitialized values clk: imx6ull: Add epdc_podf instead of sim_podf clk: imx: imx7d: correct video pll clock tree clk: imx: imx7d: add the Keypad Port module clock clk: imx7d: add CAAM clock clk: imx: imx7d: add the snvs clock clk: imx: imx6sx: update cko mux options * clk-bcm: clk: bcm2835: De-assert/assert PLL reset signal when appropriate * clk-cs2000: clk: cs2000: set pm_ops in hibernate-compatible way * clk-imx6sll: clk: imx: add clock driver for imx6sll dt-bindings: imx: update clock doc for imx6sll clk: imx: add new gate/gate2 wrapper funtion clk: imx: Add CLK_IS_CRITICAL flag for busy divider and busy mux
| | | | * | | | | dt-bindings: imx: update clock doc for imx6sllBai Ping2018-04-061-0/+36
| | | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock binding doc update for imx6sll. Signed-off-by: Bai Ping <ping.bai@nxp.com> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * / / / / / dt-bindings: documentation: add clock bindings information for Stratix10Dinh Nguyen2018-04-061-0/+20
| | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document that Stratix10 clock bindings, and add the clock header file. The clock header is an enumeration of all the different clocks on the Stratix10 platform. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *-----. | | | | | Merge branches 'clk-davinci', 'clk-si544', 'clk-rockchip', 'clk-uniphier' ↵Stephen Boyd2018-04-065-0/+286
| |\ \ \ \| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and 'clk-ti-flag-fix' into clk-next * clk-davinci: clk: davinci: Remove redundant dev_err calls clk: davinci: cfgchip: Add TI DA8XX USB PHY clocks clk: davinci: New driver for TI DA8XX CFGCHIP clocks dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocks clk: davinci: Add platform information for TI DM646x PSC clk: davinci: Add platform information for TI DM644x PSC clk: davinci: Add platform information for TI DM365 PSC clk: davinci: Add platform information for TI DM355 PSC clk: davinci: Add platform information for TI DA850 PSC clk: davinci: Add platform information for TI DA830 PSC clk: davinci: New driver for davinci PSC clocks dt-bindings: clock: New bindings for TI Davinci PSC clk: davinci: Add platform information for TI DM646x PLL clk: davinci: Add platform information for TI DM644x PLL clk: davinci: Add platform information for TI DM365 PLL clk: davinci: Add platform information for TI DM355 PLL clk: davinci: Add platform information for TI DA850 PLL clk: davinci: Add platform information for TI DA830 PLL clk: davinci: New driver for davinci PLL clocks dt-bindings: clock: Add new bindings for TI Davinci PLL clocks * clk-si544: clk: Add driver for the si544 clock generator chip * clk-rockchip: clk: rockchip: assign correct id for pclk_ddr and hclk_sd in rk3399 clk: rockchip: Fix error return in phase clock registration clk: rockchip: Correct the behaviour of restoring cached phase clk: rockchip: Fix wrong parents for MMC phase clock for rk3328 clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228 clk: rockchip: Add 1.6GHz PLL rate for rk3399 clk: rockchip: Restore the clock phase after the rate was changed clk: rockchip: Prevent calculating mmc phase if clock rate is zero clk: rockchip: Free the memory on the error path clk: rockchip: document hdmi_phy external input for rk3328 clk: rockchip: add flags for rk3328 dclk_lcdc clk: rockchip: remove ignore_unused flag from rk3328 vio_h2p clocks clk: rockchip: protect all remaining rk3328 interconnect clocks clk: rockchip: export sclk_hdmi_sfc on rk3328 clk: rockchip: remove HCLK_VIO from rk3328 dt header clk: rockchip: fix hclk_vio_niu on rk3328 * clk-uniphier: clk: uniphier: add additional ethernet clock lines for Pro4 clk: uniphier: add SATA clock control support clk: uniphier: add PCIe clock control support clk: uniphier: add ethernet clock control support for PXs3 clk: uniphier: add Pro4/Pro5/PXs2 audio system clock * clk-ti-flag-fix: clk: ti: fix flag space conflict with clkctrl clocks clk: ti: clkctrl: add support for CLK_SET_RATE_PARENT flag
| | | | * | | | | | clk: rockchip: document hdmi_phy external input for rk3328Heiko Stuebner2018-02-121-0/+1
| | | | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hdmi-phy block inside the soc also loops its pll output back into the clock controller, so document that already used input clock. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Rob Herring <robh@kernel.org>
| | | * / / / / / clk: Add driver for the si544 clock generator chipMike Looijmans2018-03-231-0/+25
| | | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the driver and devicetree documentation for the Silicon Labs SI544 clock generator chip. This is an I2C controlled oscillator capable of generating clock signals ranging from 200kHz to 1500MHz. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> [sboyd: assign max_freq to 0 in is_valid_frequency() to squelch warning] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | | | | dt-bindings: clock: Add bindings for DA8XX CFGCHIP clocksDavid Lechner2018-03-201-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a new binding for the clocks present in the CFGCHIP syscon registers in TI DA8XX SoCs. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | | | | dt-bindings: clock: New bindings for TI Davinci PSCDavid Lechner2018-03-201-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a new binding for the Power Sleep Controller (PSC) for the mach-davinci family of processors. Note: Although TI Keystone has a very similar PSC, we are not using the existing bindings. Keystone is using a legacy one-node-per-clock binding (actually two nodes if you count the separate reset binding for the same IP block). Also, some davinci LPSCs have quirks that aren't handled by the keystone bindings, so we would be adding one compatible string per clock with quirks instead of just a new compatible string for each controller. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | | | | dt-bindings: clock: Add new bindings for TI Davinci PLL clocksDavid Lechner2018-03-201-0/+96
| | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a new binding for the PLL IP blocks in the mach-davinci family of processors. Currently, only da850 has device tree support but these bindings can also work for other SoCs in this family just by adding new compatible strings. Note: Although these PLL controllers are very similar to the TI Keystone SoCs, we are not re-using those bindings. The Keystone bindings use a legacy one-node-per-clock binding. Furthermore, the mach-davinici SoCs have a slightly different PLL register layout and a number of quirks that can't be handled by the existing bindings, so the keystone bindings could not be used as-is anyway. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *-----. \ \ \ \ \ Merge branches 'clk-mediatek', 'clk-hisi', 'clk-allwinner', 'clk-ux500' and ↵Stephen Boyd2018-04-063-7/+23
| |\ \ \ \ \ \ \ \ \ | | | | |_|/ / / / / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-renesas' into clk-next * clk-mediatek: clk: mediatek: add audsys support for MT2701 clk: mediatek: add devm_of_platform_populate() for MT7622 audsys dt-bindings: clock: mediatek: add audsys support for MT2701 dt-bindings: clock: mediatek: update audsys documentation to adapt MFD device clk: mediatek: update missing clock data for MT7622 audsys clk: mediatek: fix PWM clock source by adding a fixed-factor clock dt-bindings: clock: mediatek: add binding for fixed-factor clock axisel_d4 * clk-hisi: clk: hisilicon: fix potential NULL dereference in hisi_clk_alloc() clk: hisilicon: mark wdt_mux_p[] as const clk: hisilicon: Mark phase_ops static clk: hi3798cv200: add emmc sample and drive clock clk: hisilicon: add hisi phase clock support clk: hi3798cv200: add COMBPHY0 clock support clk: hi3798cv200: fix define indentation clk: hi3798cv200: add support for HISTB_USB2_OTG_UTMI_CLK clk: hi3798cv200: correct IR clock parent clk: hi3798cv200: fix unregister call sequence in error path * clk-allwinner: clk: sunxi-ng: add missing hdmi-slow clock for H6 CCU clk: sunxi-ng: add support for the Allwinner H6 CCU dt-bindings: add device tree binding for Allwinner H6 main CCU clk: sunxi-ng: Support fixed post-dividers on NKMP style clocks clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO clk: sunxi-ng: h3: h5: Allow some clocks to set parent rate clk: sunxi-ng: h3: h5: Add minimal rate for video PLL clk: sunxi-ng: Add check for minimal rate to NM PLLs clk: sunxi-ng: Use u64 for calculation of nkmp rate clk: sunxi-ng: Mask nkmp factors when setting register clk: sunxi-ng: remove select on obsolete SUNXI_CCU_X kconfig name * clk-ux500: clk: ux500: Drop AB8540/9540 support * clk-renesas: (27 commits) clk: renesas: cpg-mssr: Adjust r8a77980 ifdef clk: renesas: rcar-gen3: Always use readl()/writel() clk: renesas: sh73a0: Always use readl()/writel() clk: renesas: rza1: Always use readl()/writel() clk: renesas: rcar-gen2: Always use readl()/writel() clk: renesas: r8a7740: Always use readl()/writel() clk: renesas: r8a73a4: Always use readl()/writel() clk: renesas: mstp: Always use readl()/writel() clk: renesas: div6: Always use readl()/writel() clk: fix false-positive Wmaybe-uninitialized warning clk: renesas: r8a77965: Replace DU2 clock clk: renesas: cpg-mssr: Add support for R-Car M3-N clk: renesas: cpg-mssr: add R8A77980 support dt-bindings: clock: add R8A77980 CPG core clock definitions clk: renesas: r8a7792: Add rwdt clock clk: renesas: r8a7794: Add rwdt clock clk: renesas: r8a7791/r8a7793: Add rwdt clock clk: renesas: r8a7790: Add rwdt clock clk: renesas: r8a7745: Add rwdt clock clk: renesas: r8a7743: Add rwdt clock ...
| | | | | * | | | | clk: renesas: cpg-mssr: Add support for R-Car M3-NJacopo Mondi2018-02-261-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initial support for R-Car M3-N (r8a77965), including core and module clocks. Based on Table 8.2d of "R-Car Series, 3rd Generation User's Manual: Hardware (Rev. 0.80, Oct 31, 2017)". Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | | | | * | | | | clk: renesas: cpg-mssr: add R8A77980 supportSergei Shtylyov2018-02-201-2/+3
| | | | |/ / / / / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add R-Car V3H (R8A77980) Clock Pulse Generator / Module Standby and Software Reset support, using the CPG/MSSR driver core and the common R-Car Gen3 code. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| | | | * | | | | dt-bindings: add device tree binding for Allwinner H6 main CCUIcenowy Zheng2018-03-181-0/+4
| | | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner H6 main CCU uses the internal oscillator of the SoC, which is different with old SoCs' main CCU. Add device tree binding for the Allwinner H6 main CCU. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| | * | | | | | dt-bindings: clock: mediatek: add audsys support for MT2701Ryder Lee2018-03-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a compatible string for MT2701. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * | | | | | dt-bindings: clock: mediatek: update audsys documentation to adapt MFD deviceRyder Lee2018-03-191-5/+14
| | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MediaTek audio hardware block that exposes functionalities that are handled by separate subsystems in the kernel. These functions are all mapped somewhere at 0x112xxxxx, and there are some control bits are mixed up with other functions within the same registers. This patch modifies example to illustrate child nodes. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *-. \ \ \ \ \ Merge branches 'clk-spreadtrum', 'clk-stm32f', 'clk-stm32mp1', 'clk-hi655x' ↵Stephen Boyd2018-04-061-0/+60
| |\ \ \ \ \ \ \ | | | |/ / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and 'clk-gpio' into clk-next * clk-spreadtrum: clk: sprd: add RTC gate for SC9860 dt-bindings: clocks: add APB RTC gate for SC9860 * clk-stm32f: clk: stm32: Add clk entry for SDMMC2 on stm32F769 clk: stm32: Add DSI clock for STM32F469 Board clk: stm32: END_PRIMARY_CLK should be declare after CLK_SYSCLK * clk-stm32mp1: clk: stm32: add configuration flags for each of the stm32 drivers clk: stm32mp1: add Debug clocks clk: stm32mp1: add MCO clocks clk: stm32mp1: add RTC clock clk: stm32mp1: add Peripheral & Kernel Clocks clk: stm32mp1: add Kernel timers clk: stm32mp1: add Sub System clocks clk: stm32mp1: add Post-dividers for PLL clk: stm32mp1: add PLL clocks clk: stm32mp1: add Source Clocks for PLLs clk: stm32mp1: add MP1 gate for hse/hsi/csi oscillators clk: stm32mp1: Introduce STM32MP1 clock driver dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindings * clk-hi655x: clk: enable hi655x common clk automatically * clk-gpio: clk: clk-gpio: Allow GPIO to sleep in set/get_parent
| | | * | | | | dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindingsGabriel Fernandez2018-03-111-0/+60
| | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RCC block is responsible of the management of the clock and reset generation for the complete circuit. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
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| *-. \ \ \ \ \ Merge branches 'clk-versatile', 'clk-doc', 'clk-must-check', 'clk-qcom' and ↵Stephen Boyd2018-04-061-3/+13
| |\ \ \ \ \ \ \ | | | |/ / / / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-debugfs' into clk-next * clk-versatile: clk: versatile: Remove WARNs in ->round_rate() clk: versatile: add min/max rate boundaries for vexpress osc clock * clk-doc: Documentation: clk: enable lock is not held for clk_is_enabled API * clk-must-check: clk: add more __must_check for bulk APIs * clk-qcom: clk: qcom: smd-rpm: Migrate to devm_of_clk_add_hw_provider() clk: qcom: gcc-msm8996: Mark aggre0 noc clks as critical * clk-debugfs: clk: Re-use DEFINE_SHOW_ATTRIBUTE() macro
| | | * | | | | Documentation: clk: enable lock is not held for clk_is_enabled APIDong Aisheng2018-03-161-3/+13
| | |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The core does not need to hold enable lock for clk_is_enabled API. Update the doc to reflect it. Cc: Jonathan Corbet <corbet@lwn.net> Cc: Stephen Boyd <sboyd@codeaurora.org> Suggested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> [sboyd: Clarified the last sentence a little more and fixed a spelling error] Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| * / / / / / dt-bindings: clock: ti: add latching support to mux and divider clocksTero Kristo2018-03-082-0/+6
| |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Certain hardware configurations, like dra76x, have some of the clock registers partitioned in a funky manner that requires the clock control setup to be latched for PRCM to be notified of the change. This is accomplished with a separate control bit under the register. Add support for this clock latching support to divider and mux clocks. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reviewed-by: Rob Herring <robh@kernel.org>
* | | | | | Merge tag 'pwm/for-4.17-rc1' of ↵Linus Torvalds2018-04-135-7/+44
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm Pull pwm updates from Thierry Reding: "This set of changes adds support for more generations of the RCar controller as well as runtime PM support. The JZ4740 driver gains support for device tree and can now be used on all Ingenic SoCs. Rounding things off is a random assortment of fixes and cleanups all across the board" * tag 'pwm/for-4.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (29 commits) pwm: rcar: Add suspend/resume support pwm: rcar: Use PM Runtime to control module clock dt-bindings: pwm: rcar: Add bindings for R-Car M3N support pwm: rcar: Fix a condition to prevent mismatch value setting to duty pwm: sysfs: Use put_device() instead of kfree() dt-bindings: pwm: sunxi: Add new compatible strings pwm: sun4i: Simplify controller mapping pwm: sun4i: Drop unused .has_rdy member pwm: sun4i: Properly check current state pwm: Remove depends on AVR32 pwm: stm32: LPTimer: Use 3 cells ->of_xlate() dt-bindings: pwm-stm32-lp: Add #pwm-cells pwm: stm32: Protect common prescaler for all channels pwm: stm32: Remove unused struct device pwm: mediatek: Improve precision in rate calculation pwm: mediatek: Remove redundant MODULE_ALIAS entries pwm: mediatek: Fix up PWM4 and PWM5 malfunction on MT7623 pwm: jz4740: Enable for all Ingenic SoCs pwm: jz4740: Add support for devicetree pwm: jz4740: Implement ->set_polarity() ...
| * | | | | | dt-bindings: pwm: rcar: Add bindings for R-Car M3N supportYoshihiro Shimoda2018-03-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds bindings for R-Car M3N. No driver update is needed. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | | | | | dt-bindings: pwm: sunxi: Add new compatible stringsAndre Przywara2018-03-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PWM controllers found in the Allwinner A64 and H5 SoCs are fully compatible to the PWM controllers found in the A13 and H3. Add new compatible strings for those SoCs to the binding document, so that they can be safely used, together with a fallback string (preferably "allwinner,sun5i-a13-pwm"). Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | | | | | dt-bindings: pwm-stm32-lp: Add #pwm-cellsGerald Baeza2018-03-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | STM32 Low-Power Timer supports generic 3 cells PWM to encode PWM number, period and polarity. Signed-off-by: Gerald Baeza <gerald.baeza@st.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | | | | | pwm: jz4740: Add support for devicetreePaul Cercueil2018-03-281-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for probing the pwm-jz4740 directly from devicetree. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | | | | | dt-bindings: pwm: renesas-tpu: Correct SoC part numbers and family namesGeert Uytterhoeven2018-03-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | R8A73A4 (not R8A77A4) is R-Mobile APE6, R8A7740 is R-Mobile (not R-Car) A1. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | | | | | dt-bindings: pwm: renesas-tpu: Correct example TPU register block sizeGeert Uytterhoeven2018-03-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Timer Pulse Unit on R-Mobile A1 has registers that lie outside the declared register block. Enlarge the register block size to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <simon.horman@netronome.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | | | | | dt-bindings: pwm: rcar: Document r8a774[35] PWM bindingsFabrizio Castro2018-03-271-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds compatible strings specific to r8a774[35], no driver change is needed as the fallback compatible string will activate the right code. Also, this patch replaces the example with a DT snippet used for adding PWM0 support to an r8a7743 based platform as the r8a7743 is now the first platform fully compatible with this driver and its PWM DT nodes refer to up-to-date code. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
| * | | | | | dt-bindings: pwm: renesas-tpu: Document r8a774[35] supportFabrizio Castro2018-03-271-1/+3
| |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document r8a774[35] specific compatible strings. No driver change is needed as the fallback compatible string "renesas,tpu" activates the right code in the driver. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* | | | | | Merge tag 'linux-watchdog-4.17-rc1' of ↵Linus Torvalds2018-04-136-0/+46
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://www.linux-watchdog.org/linux-watchdog Pull watchdog updates from Wim Van Sebroeck: - Add Nuvoton NPCM watchdog driver - renesas_wdt: Add R-Car Gen2 support - renesas_wdt: add suspend/resume and restart handler support - hpwdt: convert to watchdog core and improve NMI - improve timeout setting/handling in various drivers - coh901327: make license text and module licence match - fix error handling in asm9260_wdt, sprd_wdt and davinci_wdt - aspeed imrovements - dw improvements (for control register & suspend/resume) - add SPDX identifiers for watchdog subsystem * tag 'linux-watchdog-4.17-rc1' of git://www.linux-watchdog.org/linux-watchdog: (35 commits) watchdog: davinci_wdt: fix error handling in davinci_wdt_probe() watchdog: add SPDX identifiers for watchdog subsystem watchdog: aspeed: Allow configuring for alternate boot watchdog: Add Nuvoton NPCM watchdog driver dt-bindings: watchdog: Add Nuvoton NPCM description watchdog: dw: save/restore control and timeout across suspend/resume watchdog: dw: RMW the control register watchdog: sprd_wdt: Fix error handling in sprd_wdt_enable() watchdog: aspeed: Fix translation of reset mode to ctrl register watchdog: renesas_wdt: Add restart handler watchdog: renesas_wdt: Add R-Car Gen2 support watchdog: renesas_wdt: Add suspend/resume support watchdog: f71808e_wdt: Fix WD_EN register read watchdog: hpwdt: Update driver version. watchdog: hpwdt: Add dynamic debug watchdog: hpwdt: Programable Pretimeout NMI watchdog: hpwdt: remove allow_kdump module parameter. watchdog: hpwdt: condition early return of NMI handler on iLO5 watchdog: hpwdt: Modify to use watchdog core. watchdog: hpwdt: Update nmi_panic message. ...
| * | | | | | dt-bindings: watchdog: Add Nuvoton NPCM descriptionJoel Stanley2018-03-241-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These bindings describe the watchdog IP as used by the Nuvoton NPCM750 (Poleg) BMC SoC. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| * | | | | | watchdog: meson: allow setting timeout in devicetreeMarcus Folkesson2018-03-031-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | watchdog_init_timeout() will allways pick timeout_param since it defaults to a valid timeout. By following best practice described in Documentation/watchdog/watchdog-kernel-api.txt, it also let us to set timout-sec property in devicetree. Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
| * | | | | | watchdog: mtk: allow setting timeout in devicetreeMarcus Folkesson2018-03-031-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | watchdog_init_timeout() will allways pick timeout_param since it defaults to a valid timeout. By following best practice described in Documentation/watchdog/watchdog-kernel-api.txt, it also let us to set timout-sec property in devicetree. Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-04 19:56:36 +0000