| Commit message (Expand) | Author | Age | Files | Lines |
* | ARC: boot log: eliminate struct cpuinfo_arc #3: don't export | Vineet Gupta | 2023-08-17 | 1 | -2/+0 |
* | arc: Bulk conversion to generic_handle_domain_irq() | Marc Zyngier | 2021-08-12 | 1 | -1/+1 |
* | ARCv2: IDU-intc: Add support for edge-triggered interrupts | Mischa Jonker | 2019-08-26 | 1 | -6/+54 |
* | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 | Thomas Gleixner | 2019-06-19 | 1 | -4/+1 |
* | ARC: mcip: update MCIP debug mask when the new cpu came online | Eugeniy Paltsev | 2018-02-28 | 1 | -5/+32 |
* | ARC: mcip: halt GFRC counter when ARC cores halt | Eugeniy Paltsev | 2018-02-28 | 1 | -0/+37 |
* | ARCv2: IDU-intc: Delete deprecated parameters in Device Trees | Yuriy Kolerov | 2017-02-06 | 1 | -16/+1 |
* | ARCv2: IDU-intc: mask all common interrupts by default | Yuriy Kolerov | 2017-02-06 | 1 | -2/+10 |
* | ARCv2: IDU-intc: Use build registers for getting numbers of interrupts | Yuriy Kolerov | 2017-02-06 | 1 | -10/+9 |
* | ARCv2: MCIP: update the BCR per current changes | Vineet Gupta | 2017-01-24 | 1 | -2/+1 |
* | ARCv2: MCIP: Deprecate setting of affinity in Device Tree | Yuriy Kolerov | 2017-01-24 | 1 | -30/+22 |
* | ARCv2: IRQ: Call entry/exit functions for chained handlers in MCIP | Yuriy Kolerov | 2017-01-04 | 1 | -0/+4 |
* | ARC: move mcip.h into include/soc and adjust the includes | Vineet Gupta | 2016-11-30 | 1 | -1/+1 |
* | ARCv2: MCIP: Use IDU_M_DISTRI_DEST mode if there is only 1 destination core | Yuriy Kolerov | 2016-11-08 | 1 | -2/+11 |
* | ARC: IRQ: Do not use hwirq as virq and vice versa | Yuriy Kolerov | 2016-11-08 | 1 | -10/+9 |
* | ARCv2: intc: untangle SMP, MCIP and IDU | Vineet Gupta | 2016-10-16 | 1 | -20/+11 |
* | ARC: irq: export some IRQs again | Vineet Gupta | 2016-05-09 | 1 | -3/+0 |
* | ARC: clocksource: DT based probe | Vineet Gupta | 2016-05-09 | 1 | -3/+1 |
* | arc: SMP: CONFIG_ARC_IPI_DBG cleanup | Valentin Rothberg | 2016-02-24 | 1 | -5/+0 |
* | ARC: SMP: No need for CONFIG_ARC_IPI_DBG | Vineet Gupta | 2016-02-24 | 1 | -8/+1 |
* | ARCv2: Elide sending new cross core intr if receiver didn't ack prev | Vineet Gupta | 2016-02-24 | 1 | -17/+10 |
* | ARCv2: SMP: Push IPI_IRQ into IPI provider | Vineet Gupta | 2016-02-24 | 1 | -0/+1 |
* | ARCv2: SMP: Emulate IPI to self using software triggered interrupt | Vineet Gupta | 2016-02-24 | 1 | -0/+15 |
* | ARCv2: boot print Low Latency Memory | Vineet Gupta | 2016-02-18 | 1 | -1/+2 |
* | ARCv2: clocksource: Rename GRTC -> GFRC ... | Vineet Gupta | 2016-01-29 | 1 | -5/+5 |
* | ARC: rename smp operation init_irq_cpu() to init_per_cpu() | Noam Camus | 2015-12-17 | 1 | -1/+1 |
* | ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_smp() | Vineet Gupta | 2015-10-28 | 1 | -8/+2 |
* | ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_early_smp() | Vineet Gupta | 2015-10-28 | 1 | -7/+8 |
* | ARC: smp: Move default boot kick/wait code out of MCIP into common code | Vineet Gupta | 2015-10-17 | 1 | -18/+0 |
* | ARC: boot log: move helper macros to header for reuse | Vineet Gupta | 2015-10-17 | 1 | -2/+1 |
* | genirq: Remove irq argument from irq flow handlers | Thomas Gleixner | 2015-09-16 | 1 | -1/+1 |
* | arc/irq: Prepare idu_cascade_isr for irq argument removal | Thomas Gleixner | 2015-07-31 | 1 | -1/+2 |
* | arc:irqchip: prepare for drivers/irqchip/irqchip.h removal | Joël Porquet | 2015-07-09 | 1 | -1/+0 |
* | ARCv2: intc: IDU: Fix potential race in installing a chained IRQ handler | Vineet Gupta | 2015-07-06 | 1 | -2/+1 |
* | ARCv2: intc: IDU: support irq affinity | Vineet Gupta | 2015-07-06 | 1 | -1/+18 |
* | ARCv2: SMP: intc: IDU 2nd level intc for dynamic IRQ distribution | Vineet Gupta | 2015-06-22 | 1 | -1/+182 |
* | ARCv2: SMP: clocksource: Enable Global Real Time counter | Vineet Gupta | 2015-06-22 | 1 | -0/+3 |
* | ARCv2: SMP: ARConnect debug/robustness | Vineet Gupta | 2015-06-22 | 1 | -4/+44 |
* | ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et al | Vineet Gupta | 2015-06-22 | 1 | -0/+117 |