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linux-rolling-lts
linux-rolling-stable
master
Linux kernel stable tree
Greg Kroah-Hartman
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path:
root
/
arch
/
arm
/
mm
/
proc-v7-2level.S
Commit message (
Expand
)
Author
Age
Files
Lines
*
ARM: 9388/2: mm: Type-annotate all per-processor assembly routines
Linus Walleij
2024-04-29
1
-4
/
+4
*
ARM: 9263/1: use .arch directives instead of assembler command line flags
Nick Desaulniers
2022-11-08
1
-0
/
+2
*
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
2019-06-19
1
-4
/
+1
*
ARM: spectre-v2: harden branch predictor on context switches
Russell King
2018-05-31
1
-6
/
+0
*
-
.
Merge branches 'arnd-fixes', 'clk', 'misc', 'v7' and 'fixes' into for-next
Russell King
2015-06-12
1
-5
/
+7
|
\
\
|
|
*
ARM: redo TTBR setup code for LPAE
Russell King
2015-06-01
1
-3
/
+3
|
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/
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/
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|
*
ARM: 8353/1: mm: Fix Cortex-A8 erratum 430973 segfaults for bootloaders and m...
Tony Lindgren
2015-05-08
1
-2
/
+4
|
/
*
ARM: proc-v7: avoid errata 430973 workaround for non-Cortex A8 CPUs
Russell King
2015-04-14
1
-4
/
+8
*
ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
Russell King
2014-07-18
1
-2
/
+2
*
ARM: 7954/1: mm: remove remaining domain support from ARMv6
Will Deacon
2014-02-10
1
-7
/
+0
*
ARM: 7784/1: mm: ensure SMP alternates assemble to exactly 4 bytes with Thumb-2
Will Deacon
2013-07-22
1
-1
/
+1
*
arm: delete __cpuinit/__CPUINIT usage from all ARM users
Paul Gortmaker
2013-07-14
1
-4
/
+0
*
ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead
Will Deacon
2013-04-03
1
-1
/
+2
*
ARM: 7650/1: mm: replace direct access to mm->context.id with new macro
Ben Dooks
2013-02-16
1
-1
/
+1
*
ARM: mm: introduce present, faulting entries for PAGE_NONE
Will Deacon
2012-11-09
1
-0
/
+4
*
ARM: mm: introduce L_PTE_VALID for page table entries
Will Deacon
2012-11-09
1
-1
/
+1
*
ARM: mm: don't use the access flag permissions mechanism for classic MMU
Will Deacon
2012-11-09
1
-2
/
+2
*
ARM: 7445/1: mm: update CONTEXTIDR register to contain PID of current process
Will Deacon
2012-07-09
1
-0
/
+5
*
ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on ASID-capable CPUs
Catalin Marinas
2012-04-17
1
-3
/
+0
*
ARM: Use TTBR1 instead of reserved context ID
Will Deacon
2012-04-17
1
-6
/
+4
*
ARM: LPAE: Factor out classic-MMU specific code into proc-v7-2level.S
Catalin Marinas
2011-12-08
1
-0
/
+171