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* arm64: dts: rockchip: set num-cs property for spi on px30Heiko Stuebner2024-02-131-0/+2
| | | | | | | | | | | | | | | | The px30 has two spi controllers with two chip-selects each. The num-cs property is specified as the total number of chip selects a controllers has and is used since 2020 to find uses of chipselects outside that range in the Rockchip spi driver. Without the property set, the default is 1, so spi devices using the second chipselect will not be created. Fixes: eb1262e3cc8b ("spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods") Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20240119101656.965744-1-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: Remove ethernet0 alias from the SoC dtsi for PX30Dragan Simic2023-12-121-1/+0
| | | | | | | | | | | | | | Not all supported boards actually use the PX30's built-in (G)MAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the PX30 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by: Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/0d9da8959b4f567622676c34b5feb74c49489554.1702366958.git.dsimic@manjaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: minor whitespace cleanup around '='Krzysztof Kozlowski2023-07-101-8/+8
| | | | | | | | | The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230702185242.44421-1-krzysztof.kozlowski@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: fix px30 dsi nodeJohan Jonker2023-03-231-1/+5
| | | | | | | | | | With the conversion of rockchip,dw-mipi-dsi.yaml a port@1 node is required, so add a node with label dsi_out. Also add label dsi_in to port@0. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/1ee3e676-aef4-f464-82b0-8fb39ba5c60d@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: fix px30 lvds nodeJohan Jonker2023-03-231-1/+5
| | | | | | | | | | With the conversion of rockchip,lvds.yaml a port@1 node is required, so add a node with label lvds_out. Also add label lvds_in to port@0. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/99895a4b-25c4-4b64-42ac-6f70940ab56e@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: update px30 thermal zones for GPUChris Morgan2023-01-101-6/+27
| | | | | | | | | | | | | | | | | | Without the trips, the following errors are received in the dmesg log and the rockchip-thermal driver fails to load the gpu sensor: "thermal_sys: Failed to find 'trips' node" "rockchip-thermal ff280000.tsadc: failed to register sensor 1: -22" Trip values are assumed, unfortunately, as the same values as the CPU. The datasheet and TRM didn't appear to have any information regarding thermals for the GPU. Stress tested successfully on my Odroid Go Advance. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20221201203655.1245-4-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: add i2s0 I2S/PDM/TDM 8ch controller to px30Quentin Schulz2022-09-161-0/+22
| | | | | | | | | | | | | | | | The Rockchip PX30 SoC has three I2S controllers, i2s1 and i2s2 are 2-channel I2S/PCM controllers handled by the same controller driver, and i2s0 a 8-channel I2S/PCM/TDM controller handled by another controller driver. This adds the device tree node required to enable I2S0 on PX30. This was tested in a 2-channel I2S with TX BCLK/LRCK for both TX and RX (rockchip,trcm-sync-tx-only) setup on a soon-to-be-released board. Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20220916091746.35108-1-foss+kernel@0leil.net Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: adjust whitespace around '='Krzysztof Kozlowski2022-06-101-1/+1
| | | | | | | | | | Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220526204218.832029-1-krzysztof.kozlowski@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: align pl330 node name with dtschemaKrzysztof Kozlowski2022-01-301-1/+1
| | | | | | | | | | Fixes dtbs_check warnings like: dmac@ff240000: $nodename:0: 'dmac@ff240000' does not match '^dma-controller(@.*)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220129175429.298836-1-krzysztof.kozlowski@canonical.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: Add missing secondary compatible for PX30 DSIDavid Heidelberg2021-12-121-1/+1
| | | | | | | | | Add second DSI compatible to comply with DT schema validation comming in the second patch. Signed-off-by: David Heidelberg <david@ixit.cz> Link: https://lore.kernel.org/r/20211211233818.88482-1-david@ixit.cz Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: change gpio nodenamesJohan Jonker2021-10-171-4/+4
| | | | | | | | | | | Currently all gpio nodenames are sort of identical to there label. Nodenames should be of a generic type, so change them all. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20211007144019.7461-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: align operating-points table name with dtschemaKrzysztof Kozlowski2021-09-201-2/+2
| | | | | | | | | | | Align the name of operating-points node to dtschema to fix warnings like: opp-table0: $nodename:0: 'opp-table0' does not match '^opp-table(-[a-z0-9]+)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210819182311.223443-2-krzysztof.kozlowski@canonical.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: add isp node for px30Heiko Stuebner2021-09-201-0/+41
| | | | | | | | Add the rkisp1 node and iommu for the px30 soc. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210830141318.66744-1-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: Add SFC to PX30Chris Morgan2021-09-151-0/+38
| | | | | | | | | Add a devicetree entry for the Rockchip SFC for the PX30 SOC. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210812134546.31340-4-jon.lin@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: Add VPU support for the PX30Paul Kocialkowski2021-09-151-0/+22
| | | | | | | | | | The PX30 has a VPU (both decoder and encoder) with a dedicated IOMMU. Describe these two entities in device-tree. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Link: https://lore.kernel.org/r/20210728230040.17368-1-ezequiel@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: add csi-dphy to px30Heiko Stuebner2021-09-151-0/+13
| | | | | | | | | Add the CSI dphy node to the core px30 devicetree for later use with the rkisp. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210722073955.1192168-1-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: rename nodename for phy-rockchip-inno-usb2Johan Jonker2021-06-031-1/+1
| | | | | | | | | | | | | | | | The pattern: "^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$" in phy-provider.yaml has required "#phy-cells" for phy nodes. The "phy-cells" in rockchip-inno-usb2 nodes are located in subnodes. Rename the nodename to pattern "usb2phy@[0-9a-f]+$" to prevent notifications. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/ phy/phy-provider.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210601164800.7670-5-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: add #power-domain-cells to power domain nodesJohan Jonker2021-05-101-0/+8
| | | | | | | | | Add #power-domain-cells to power domain nodes, because they are required by power-domain.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210417112952.8516-9-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: Fix power-controller node names for px30Elaine Zhang2021-05-101-8/+8
| | | | | | | | | | | Use more generic names (as recommended in the device tree specification or the binding documentation) Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210417112952.8516-6-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: Remove useless interrupt-names properties from px30 ↵Benjamin Gaignard2021-05-101-2/+0
| | | | | | | | | | IOMMU nodes Remove useless interrupt-names properties for IOMMU nodes Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> Link: https://lore.kernel.org/r/20210507090232.233049-6-benjamin.gaignard@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: move mmc aliases to board dts on px30Heiko Stuebner2021-04-111-3/+0
| | | | | | | | | | | | | | As suggested by Arnd Bergmann, the newly added mmc aliases should be board specific, so move them from the general dtsi to the individual boards. For the Engicam-boards this means a split as the core boards contains the emmc while the commit baseboard handles sdmmc and sdio. Suggested-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-3-heiko@sntech.de
* arm64: dts: rockchip: add new watchdog compatible to px30.dtsiJohan Jonker2021-03-251-1/+1
| | | | | | | | | | | | | | | | The watchdog compatible strings are suppose to be SoC orientated. In the more recently added Rockchip px30.dtsi file only the fallback string "snps,dw-wdt" is used, so add the new compatible string: "rockchip,px30-wdt", "snps,dw-wdt" make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20201218120534.13788-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: Add gpu opp nodes to px30 dtsiMaciej Matuszczyk2021-03-211-0/+22
| | | | | | | | | This matches the values in the vendor kernel. Signed-off-by: Maciej Matuszczyk <maccraft123mc@gmail.com> [added tiny commit description] Link: https://lore.kernel.org/r/20210225081943.127714-1-maccraft123mc@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* Merge tag 'arm-dt-v5.12' of ↵Linus Torvalds2021-02-201-36/+47
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC devicetree updates from Arnd Bergmann: "After the last release contained a surprising amount of new 32-bit machines, this time two thirds of the code changes are for 64-bit. The usual updates to existing files include: - Device tree compiler warning fixes for Berlin, Renesas, SoCFPGA, nomadik, stm32, Allwinner, TI Keystone - Support for additional devices on existing machines on Renesas, SoCFPGA, at91, hisilicon, OMAP, Tegra, TI K3, Allwinner, Broadcom, ux500, Mediatek, Marvell Armada, Marvell MMP, ZynqMP, AMLogic, Qualcomm, i.MX, Layerscape, Actions, ASpeed, Toshiba - Cleanups and minor fixes for Renesas, at91, mstar, ux500, Samsung, stm32, Tegra, Broadcom, Mediatek, Marvell MMP, AMLogic, Qualcomm, i.MX, Rockchip, ASpeed, Zynq Only three new SoCs this time, but a number of boards across: Renesas: - Two Beacon EmbeddedWorks boards (RZ/G2H and RZ/G2N based) Intel SoCFPGA: - eASIC N5X board (N5X) ST-Ericsson Ux500: - Samsung GT-I9070 (Janice) phone (u8500) TI OMAP: - MYIR Tech Limited development board (AM335X) Allwinner/sunxi: - SL631 Action Camera (V3) - PineTab Early Adopter tablet (A64) Broadcom: - BCM4906 networking chip - Netgear R8000P router (BCM4906) AMLogic: - Hardkernel ODROID-HC4 development board (SM1) - Beelink GS-King-X TV Box (S922X) Qualcomm: - Snapdragon 888 / SM8350 high-end phone SoC - Qualcomm SDX55 5G modem as standalone SoC - Snapdragon MTP reference board (SM8350) - Snapdragon MTP reference board (SDX55) - Sony Kitakami phones: Xperia Z3+/Z4/Z5 (APQ8094) - Alcatel Idol 3 phone (MSM8916) - ASUS Zenfone 2 Laser phone (MSM8916) - BQ Aquaris X5 aka Longcheer L8910 phone (MSM8916) - OnePlus6 phone (SDM845) - OnePlus6T phone (SDM845) - Alfa Network AP120C-AC access point (IPQ4018) NXP i.MX6 (32-bit): - Plymovent BAS base system controller for filter systems (imx6dl) - Protonic MVT industrial touchscreen terminals (imx6dl) - Protonic PRTI6G reference board (imx6ul) - Kverneland UT1, UT1Q, UT1P, TGO agricultural terminals (imx6q/dl/qp) NXP i.MX8 (64-bit) - Beacon i.MX8M Nano development kit (imx8mn) - Boundary Devices i.MX8MM Nitrogen SBC (imx8mm) - Gateworks Venice i.MX 8M Mini Development Kits (imx8mm) - phyBOARD-Pollux-i.MX8MP (imx8mp) - Purism Librem5 Evergreen phone (imx8mp) - Kontron SMARC-sAL28 system-on-module(imx8mp) Rockchip: - NanoPi M4B Single-board computer (RK3399) - Radxa Rock Pi E router SBC (RK3328) ASpeed: - Ampere Mt. Jade, a BMC for an x86 server (AST2500) - IBM Everest, a BMC for a Power10 server (AST2600) - Supermicro x11spi, a BMC for an ARM server (AST2500) Zynq: - Ebang EBAZ4205, FPGA board (Zynq-7000) - ZynqMP zcu104 revC reference platform (ZynqMP)" * tag 'arm-dt-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (584 commits) ARM: dts: aspeed: align GPIO hog names with dtschema ARM: dts: aspeed: fix PCA95xx GPIO expander properties on Portwell dt-bindings: spi: zynq: Convert Zynq QSPI binding to yaml arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver ARM: dts: aspeed: ast2600evb: Add enable ehci and uhci ARM: dts: aspeed: mowgli: Add i2c rtc device ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address dt-bindings: arm: xilinx: Add missing Zturn boards ARM: dts: ebaz4205: add pinctrl entries for switches ARM: dts: add Ebang EBAZ4205 device tree dt-bindings: arm: add Ebang EBAZ4205 board dt-bindings: add ebang vendor prefix ARM: dts: aspeed: Add Everest BMC machine ARM: dts: aspeed: inspur-fp5280g2: Add ipsps1 driver ARM: dts: aspeed: inspur-fp5280g2: Add GPIO line names ARM: dts: aspeed: Add Supermicro x11spi BMC machine ARM: dts: aspeed: g220a: Fix some gpio ARM: dts: aspeed: g220a: Enable ipmb ARM: dts: aspeed: rainier: Add eMMC clock phase compensation ARM: dts: aspeed: Add LCLK to lpc-snoop ...
| * arm64: dts: rockchip: assign a fixed index to mmc devices on px30 boardsJohan Jonker2021-02-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Recently introduced async probe on mmc devices can shuffle block IDs. Pin them to fixed values to ease booting in environments where UUIDs are not practical. Use newly introduced aliases for mmcblk devices from [1]. The sort order is based on reg address. [1] https://patchwork.kernel.org/patch/11747669/ Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210118155242.7172-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * arm64: dts: rockchip: Remove bogus "amba" bus nodesRobin Murphy2021-02-011-16/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful purpose, and certainly bear no relation at all to the actual underlying interconnect topology. They appear to be cargo-cult copying from a design misstep in the very early days of FDT adoption on ARM, which was righted with the "arm,primecell" compatible, and the last trace of the idea finally purged by commit 2ef7d5f342c1 ("ARM, ARM64: dts: drop "arm,amba-bus" in favor of "simple-bus""). As such, they can simply be removed and the DMA-330 nodes fitted into the normal sort order. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/131e0ea065109760ea3b59c4bb90cf4fac7826f7.1611186142.git.robin.murphy@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * arm64: dts: rockchip: Add NFC node for PX30 SoCYifeng Zhao2021-01-181-0/+15
| | | | | | | | | | | | | | | | Add NAND FLASH Controller(NFC) node for PX30 SoC. Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Link: https://lore.kernel.org/r/20201210002219.5739-1-yifeng.zhao@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| * arm64: dts: rockchip: add QoS register compatibles for px30Johan Jonker2021-01-091-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With the conversion of syscon.yaml minItems for compatibles was set to 2. Current Rockchip dtsi files only use "syscon" for QoS registers. Add Rockchip QoS compatibles for px30 to reduce notifications produced with: make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mfd/syscon.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20201206103711.7465-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | arm64: dts: rockchip: fix vopl iommu irq on px30Sandy Huang2021-01-091-1/+1
|/ | | | | | | | | | | | The vop-mmu shares the irq with its matched vop but not the vpu. Fixes: 7053e06b1422 ("arm64: dts: rockchip: add core dtsi file for PX30 SoCs") Signed-off-by: Sandy Huang <hjc@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Tested-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Link: https://lore.kernel.org/r/20210108110627.3231226-1-heiko@sntech.de
* arm64: dts: rockchip: Add 'arm,pl330-periph-burst' for dmacSugar Zhang2020-07-181-0/+1
| | | | | | | | | | This patch Add the quirk to specify to use burst transfer for better compatible and higher performance. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Link: https://lore.kernel.org/r/1593439935-68540-1-git-send-email-sugar.zhang@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: rename label and nodename pinctrl subnodes that end ↵Johan Jonker2020-06-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | | with gpio A test with the command below gives for example this error: arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dt.yaml: tsadc: tsadc-otp-gpio: {'phandle': [[90]], 'rockchip,pins': [[0, 6, 0, 123]]} is not of type 'array' 'gpio' is a sort of reserved nodename and should not be used for pinctrl in combination with 'rockchip,pins', so change nodes that end with 'gpio' to end with 'pin' or 'pins'. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/ dtschema/schemas/gpio/gpio.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200524160636.16547-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* Merge tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2020-06-041-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM devicetree updates from Arnd Bergmann: "This is the set of device tree changes, mostly covering new hardware support, with 577 patches touching a little over 500 files. There are five new Arm SoCs supported in this release, all of them for existing SoC families: - Realtek RTD1195, RTD1395 and RTD1619 -- three SoCs used in both NAS devices and Android Set-top-box designs, along with the "Horseradish", "Lion Skin" and "Mjolnir" reference platforms; the Mele X1000 and Xnano X5 set-top-boxes and the Banana Pi BPi-M4 single-board computer. - Renesas RZ/G1H (r8a7742) -- a high-end 32-bit industrial SoC and the iW-RainboW-G21D-Qseven-RZG1H board/SoM - Rockchips RK3326 -- low-end 64-bit SoC along with the Odroid-GO Advance game console Newly added machines on already supported SoCs are: - AMLogic S905D based Smartlabs SML-5442TW TV box - AMLogic S905X3 based ODROID-C4 SBC - AMLogic S922XH based Beelink GT-King Pro TV box - Allwinner A20 based Olimex A20-OLinuXino-LIME-eMMC SBC - Aspeed ast2500 based BMCs in Facebook x86 "Yosemite V2" and YADRO OpenPower P9 "Nicole" - Marvell Kirkwood based Check Point L-50 router - Mediatek MT8173 based Elm/Hana Chromebook laptops - Microchip SAMA5D2 "Industrial Connectivity Platform" reference board - NXP i.MX8m based Beacon i.MX8m-Mini SoM development kit - Octavo OSDMP15x based Linux Automation MC-1 development board - Qualcomm SDM630 based Xiaomi Redmi Note 7 phone - Realtek RTD1295 based Xnano X5 TV Box - STMicroelectronics STM32MP1 based Stinger96 single-board computer and IoT Box - Samsung Exynos4210 based based Samsung Galaxy S2 phone - Socionext Uniphier based Akebi96 SBC - TI Keystone based K2G Evaluation board - TI am5729 based Beaglebone-AI development board Include device descriptions for additional hardware support in existing SoCs and machines based on all major SoC platforms: - AMlogic Meson - Allwinner sunxi - Arm Juno/VFP/Vexpress/Integrator - Broadcom bcm283x/bcm2711 - Hisilicon hi6220 - Marvell EBU - Mediatek MT27xx, MT76xx, MT81xx and MT67xx - Microchip SAMA5D2 - NXP i.MX6/i.MX7/i.MX8 and Layerscape - Nvidia Tegra - Qualcomm Snapdragon - Renesas r8a77961, r8a7791 - Rockchips RK32xx/RK33xx - ST-Ericsson ux500 - STMicroelectronics SMT32 - Samsung Exynos and S5PV210 - Socionext Uniphier - TI OMAP5/DRA7 and Keystone" * tag 'arm-dt-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (564 commits) ARM: dts: keystone: Rename "msmram" node to "sram" arm: dts: mt2712: add uart APDMA to device tree arm64: dts: mt8183: add mmc node arm64: dts: mt2712: add ethernet device node arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1 ARM: dts: mmp3: Add the fifth SD HCI ARM: dts: berlin*: Fix up the SDHCI node names ARM: dts: mmp3: Fix USB & USB PHY node names ARM: dts: mmp3: Fix L2 cache controller node name ARM: dts: mmp*: Fix up encoding of the /rtc interrupts property ARM: dts: pxa*: Fix up encoding of the /rtc interrupts property ARM: dts: pxa910: Fix the gpio interrupt cell number ARM: dts: pxa3xx: Fix up encoding of the /gpio interrupts property ARM: dts: pxa168: Fix the gpio interrupt cell number ARM: dts: pxa168: Add missing address/size cells to i2c nodes ARM: dts: dove: Fix interrupt controller node name ARM: dts: kirkwood: Fix interrupt controller node name arm64: dts: Add SC9863A emmc and sd card nodes arm64: dts: Add SC9863A clock nodes arm64: dts: mt6358: add PMIC MT6358 related nodes ...
| * arm64: dts: rockchip: add bus-width properties to mmc nodes for px30Johan Jonker2020-05-191-0/+3
| | | | | | | | | | | | | | | | | | | | 'bus-width' and pinctrl containing the bus-pins should be in the same file, so add them to all mmc nodes in 'px30.dtsi'. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200416183053.6045-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* | arm64: dts: rockchip: Correct PMU compatibles for PX30 and RK3308Robin Murphy2020-04-191-1/+1
|/ | | | | | | | | A proper binding for the Cortex-A35 PMU actually predates these DTs being upstreamed, so use it. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/6dfed94a99780c2314b38ff2b55a7efa0be4edbc.1587125314.git.robin.murphy@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: remove clock-names property from 'generic-ohci' nodesJohan Jonker2020-03-171-1/+0
| | | | | | | | | | | | | | | | | A test with the command below gives for example this error: arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: usb@ff5d0000: 'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' 'clock-names' is not a valid property name for usb_host nodes with compatible string 'generic-ohci', so remove them. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ohci.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200312171441.21144-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: remove clock-names property from 'generic-ehci' nodesJohan Jonker2020-03-171-1/+0
| | | | | | | | | | | | | | | | | A test with the command below gives for example this error: arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: usb@ff5c0000: 'clock-names' does not match any of the regexes: 'pinctrl-[0-9]+' 'clock-names' is not a valid property name for usb_host nodes with compatible string 'generic-ehci', so remove them. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/generic-ehci.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200312171441.21144-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: add bus to rockchip amba nodenamesJohan Jonker2020-03-111-1/+1
| | | | | | | | | | | | | | | | | | | | | A test with the command below gives for example this error: arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml: amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' AMBA is a open standard for the connection and management of functional blocks in a SoC. It's compatible with 'simple-bus', so fix this error by adding 'bus' to all Rockchip 'amba' nodes. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/ schemas/simple-bus.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200302153047.17101-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: remove rockchip,grf from vop nodes for px30Johan Jonker2020-03-111-2/+0
| | | | | | | | | | | | | | | | | | | | | | | An experimental test with the command below without additional properties in 'rockchip-vop.yaml' gives this error: arch/arm64/boot/dts/rockchip/px30-evb.dt.yaml: vop@ff470000: 'power-domains', 'rockchip,grf' do not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/rockchip/px30-evb.dt.yaml: vop@ff460000: 'power-domains', 'rockchip,grf' do not match any of the regexes: 'pinctrl-[0-9]+' 'rockchip,grf' is not used by the Rockchip VOP driver, so remove it from 'vop' nodes in 'px30.dtsi'. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/display/ rockchip/rockchip-vop.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200309081600.3887-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: fix px30 lvds portsHeiko Stuebner2020-03-011-11/+14
| | | | | | | | | | The lvds controller has two ports. port@0 for the connection to the display controller(s) and port@1 for the connection to the panel, so should have a ports node covering the port@x nodes. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20200121222055.4068166-1-heiko@sntech.de
* arm64: dts: remove g-use-dma from rockchip usb nodesJohan Jonker2020-03-011-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | A test with the command below gives these errors: arch/arm64/boot/dts/rockchip/px30-evb.dt.yaml: usb@ff300000: 'g-use-dma', 'power-domains' do not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/rockchip/rk3328-a1.dt.yaml: usb@ff580000: 'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/rockchip/rk3328-evb.dt.yaml: usb@ff580000: 'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/rockchip/rk3328-rock64.dt.yaml: usb@ff580000: 'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dt.yaml: usb@ff580000: 'g-use-dma' does not match any of the regexes: 'pinctrl-[0-9]+' 'g-use-dma' is not a valid option in dwc2.yaml, so remove it from all Rockchip dtsi files. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/usb/dwc2.yaml g-use-dma was deprecated in november 2016, see https://patchwork.kernel.org/patch/9420553/ Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200228113922.20266-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: rename dwmmc node names to mmcJohan Jonker2020-01-181-3/+3
| | | | | | | | | | | | | | Current dts files with 'dwmmc' nodes are manually verified. In order to automate this process rockchip-dw-mshc.txt has to be converted to yaml. In the new setup rockchip-dw-mshc.yaml will inherit properties from mmc-controller.yaml and synopsys-dw-mshc-common.yaml. 'dwmmc' will no longer be a valid name for a node, so change them all to 'mmc' Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200115185244.18149-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: fix dwmmc clock name for px30Johan Jonker2020-01-131-3/+3
| | | | | | | | | | | | | | | | An experimental test with the command below gives this error: px30-evb.dt.yaml: dwmmc@ff390000: clock-names:2: 'ciu-drive' was expected 'ciu-drv' is not a valid dwmmc clock name, so fix this by changing it to 'ciu-drive'. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200110161200.22755-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: Add PX30 LVDSMiquel Raynal2020-01-061-0/+37
| | | | | | | | | Describe LVDS IP. Add the CRTC and LVDS relevant endpoints so they can be linked together. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191224143900.23567-12-miquel.raynal@bootlin.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: add dsi controller for px30Heiko Stuebner2020-01-061-0/+48
| | | | | | | | This adds the dw-mipi-dsi controller and hooks it into the display-subsystem on px30. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20200106112005.795834-1-heiko@sntech.de
* arm64: dts: rockchip: Add PX30 DSI DPHYMiquel Raynal2020-01-061-0/+12
| | | | | | | | | Add the PHY which outputs MIPI DSI and LVDS. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191224143900.23567-11-miquel.raynal@bootlin.com [added dsi power-domain, following vendor-kernel] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* arm64: dts: rockchip: add the gpu for px30Heiko Stuebner2019-12-161-0/+19
| | | | | | | | The px30 contains a Mali Bifrost gpu, so add the necessary core node for it with interrupts and powerdomains. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20191208145508.3124-2-heiko@sntech.de
* arm64: dts: rockchip: add thermal infrastructure to px30Heiko Stuebner2019-12-091-0/+64
| | | | | | | Add tsadc and necessary connections to core px30 components. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20191116095249.31193-1-heiko@sntech.de
* arm64: dts: rockchip: remove 408MHz operating point from px30Heiko Stuebner2019-12-091-6/+1
| | | | | | | | | | | | It looks like the px30 is running unstable at this 408MHz operating point. This shows in stalled threads and other big numbers of kernel exception. At 600MHz and above it instead works stable and as expected. As the 408MHz point doesn't even decrease the voltage compared to 600MHz, just drop this 408MHz operating point for now. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20191116095220.31122-1-heiko@sntech.de
* arm64: dts: rockchip: add usb2phy for px30Heiko Stuebner2019-11-051-0/+43
| | | | | | | | Add the usb2phy node on the px30 and hook it up to the usb controllers it supplies. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20190917082659.25549-12-heiko@sntech.de
* arm64: dts: rockchip: remove px30 default optee nodeHeiko Stuebner2019-11-051-7/+0
| | | | | | | | | | | | | Having a default optee node in a soc devicetree is not really good. For one there is no guarantee that any tee got loaded and there's even the possibility that a completely different TEE got loaded. OP-Tee however will insert relevant nodes to the devicetree (firmware +reserved memory sections) during its own startup, so there really is no need to provide a default node. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20191023224409.3550-1-heiko@sntech.de
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-28 23:33:40 +0000