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path: root/arch/arm64/include/asm/mmu_context.h
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* mm: Expose untagging mask in /proc/$PID/statusKirill A. Shutemov2023-03-161-0/+6
* arm64/kpti: Move DAIF masking to C codeMark Brown2022-11-251-0/+10
* treewide: Drop function_nocfiSami Tolvanen2022-09-261-1/+1
* arm64: Drop unneeded __nocfi attributesSami Tolvanen2022-09-261-1/+1
* arm64: mm: provide idmap pointer to cpu_replace_ttbr1()Ard Biesheuvel2022-06-241-4/+9
* arm64: head: drop idmap_ptrs_per_pgdArd Biesheuvel2022-06-241-1/+0
* arm64: head: move assignment of idmap_t0sz to C codeArd Biesheuvel2022-06-241-1/+1
* arm64: hibernate: abstract ttrb0 setup functionPasha Tatashin2021-10-011-0/+24
* arm64: Implement task_cpu_possible_mask()Will Deacon2021-08-201-0/+13
* arm64/mm: Fix ttbr0 values stored in struct thread_info for software-panAnshuman Khandual2021-06-151-2/+2
* arm64: add __nocfi to functions that jump to a physical addressSami Tolvanen2021-04-081-1/+1
* arm64: use function_nocfi with __pa_symbolSami Tolvanen2021-04-081-1/+1
* arm64: mm: remove unused __cpu_uses_extended_idmap[_level()]Ard Biesheuvel2021-03-111-14/+0
* arm64: mm: use a 48-bit ID map when possible on 52-bit VA buildsArd Biesheuvel2021-03-111-4/+1
* arm64: mm: Always update TCR_EL1 from __cpu_set_tcr_t0sz()James Morse2021-01-271-4/+3
* Merge tag 'asm-generic-mmu-context-5.11' of git://git.kernel.org/pub/scm/linu...Linus Torvalds2020-12-151-4/+4
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| * arm64: use asm-generic/mmu_context.h for no-op implementationsNicholas Piggin2020-10-271-4/+4
* | arm64: consistently use reserved_pg_dirMark Rutland2020-11-101-3/+3
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* arm64: mm: Pin down ASIDs for sharing mm with devicesJean-Philippe Brucker2020-09-281-1/+10
* arm64/mm: save memory access in check_and_switch_context() fast switch pathPingfan Liu2020-07-301-4/+2
* mm: reorder includes after introduction of linux/pgtable.hMike Rapoport2020-06-091-1/+1
* mm: introduce include/linux/pgtable.hMike Rapoport2020-06-091-1/+1
* arm64: mm: convert cpu_do_switch_mm() to CMark Rutland2020-02-271-0/+2
* arm64: mm: Introduce 52-bit Kernel VAsSteve Capper2019-08-091-1/+1
* arm64: mm: Introduce vabits_actualSteve Capper2019-08-091-1/+1
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner2019-06-191-12/+1
* arm64: Kconfig: Re-jig CONFIG options for 52-bit VAWill Deacon2018-12-101-1/+1
* arm64: mm: introduce 52-bit userspace supportSteve Capper2018-12-101-0/+3
* arm64: mm: apply r/o permissions of VM areas to its linear alias as wellArd Biesheuvel2018-11-201-0/+2
* arm64: mm: Support Common Not Private translationsVladimir Murzin2018-09-181-2/+15
* arm64: mm: Use READ_ONCE/WRITE_ONCE when accessing page tablesWill Deacon2018-02-161-2/+2
* arm64: kpti: Fix the interaction between ASID switching and software PANCatalin Marinas2018-01-161-1/+2
* arm64: fix ID map extension to 52 bitsKristina Martsenko2018-01-151-3/+2
* Merge branch 'for-next/52-bit-pa' into for-next/coreCatalin Marinas2017-12-221-1/+11
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| * arm64: allow ID map to be extended to 52 bitsKristina Martsenko2017-12-221-0/+10
| * arm64: handle 52-bit addresses in TTBRKristina Martsenko2017-12-221-1/+1
* | arm64: mm: Remove pre_ttbr0_update_workaround for Falkor erratum #E1003Will Deacon2017-12-111-2/+0
* | arm64: mm: Move ASID from TTBR0 to TTBR1Will Deacon2017-12-111-0/+7
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* arm64: SW PAN: Update saved ttbr0 value on enter_lazy_tlbWill Deacon2017-12-061-14/+10
* arm64: SW PAN: Point saved ttbr0 at the zero page when switching to init_mmWill Deacon2017-12-061-9/+13
* sched/headers: Prepare to remove the <linux/mm_types.h> dependency from <linu...Ingo Molnar2017-03-021-0/+1
* sched/headers: Prepare for new header dependencies before moving code to <lin...Ingo Molnar2017-03-021-0/+1
* arm64: Work around Falkor erratum 1003Christopher Covington2017-02-101-1/+7
* arm64: Use __pa_symbol for kernel symbolsLaura Abbott2017-01-121-3/+3
* arm64: Disable TTBR0_EL1 during normal kernel executionCatalin Marinas2016-11-211-14/+39
* arm64: simplify contextidr_thread_switchMark Rutland2016-09-091-6/+3
* arm64: simplify sysreg manipulationMark Rutland2016-09-091-17/+10
* arm64: Ensure the secondary CPUs have safe ASIDBits sizeSuzuki K Poulose2016-02-251-0/+2
* arm64: mm: add code to safely replace TTBR1_EL1Mark Rutland2016-02-161-0/+19
* arm64: add function to install the idmapMark Rutland2016-02-161-2/+14
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