summaryrefslogtreecommitdiffstats
path: root/arch/arm64/kernel/entry-fpsimd.S
Commit message (Expand)AuthorAgeFilesLines
* arm64/sme: Implement context switching for ZT0Mark Brown2023-01-201-10/+20
* arm64/sme: Implement ZA context switchingMark Brown2022-04-221-0/+22
* arm64/sme: Implement streaming SVE context switchingMark Brown2022-04-221-0/+5
* arm64/sme: Identify supported SME vector lengths at bootMark Brown2022-04-221-0/+9
* arm64/sve: Explicitly load vector length when restoring SVE stateMark Brown2021-10-211-2/+1
* arm64/sve: Make access to FFR optionalMark Brown2021-10-211-7/+12
* arm64/sve: Remove sve_load_from_fpsimd_state()Mark Brown2021-10-211-16/+0
* arm64/sve: Add some comments for sve_save/load_state()Mark Brown2021-08-241-0/+13
* arm64/sve: Skip flushing Z registers with 128 bit vectorsMark Brown2021-05-261-2/+10
* arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state()Mark Brown2021-05-261-5/+4
* arm64/sve: Split _sve_flush macro into separate Z and predicate flushesMark Brown2021-05-261-1/+2
* arm64/sve: Rework SVE access trap to convert state in registersMark Brown2021-04-081-0/+5
* arm64/sve: Implement a helper to load SVE registers from FPSIMD stateJulien Grall2020-09-211-0/+17
* arm64/sve: Implement a helper to flush SVE registersJulien Grall2020-09-211-0/+8
* arm64: kernel: Convert to modern annotations for assembly functionsMark Brown2020-05-041-10/+10
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner2019-06-191-12/+1
* arm64/sve: Write ZCR_EL1 on context switch only if changedDave Martin2018-05-171-1/+1
* arm64/sve: Low-level SVE architectural state manipulation functionsDave Martin2017-11-031-0/+17
* arm64: neon: Remove support for nested or hardirq kernel-mode NEONDave Martin2017-08-041-24/+0
* arm64: fpsimd: fix a typo in fpsimd_save_partial_state ENDPROCbyungchul.park2014-07-311-1/+1
* arm64: add support for kernel mode NEON in interrupt contextArd Biesheuvel2014-05-081-0/+24
* arm64: move FP-SIMD save/restore code to a macroMarc Zyngier2012-12-051-40/+3
* arm64: Floating point and SIMDCatalin Marinas2012-09-171-0/+80