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path: root/arch/mips/include/asm/mipsregs.h
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* MIPS: include linux/types.hQais Yousef2014-03-231-0/+1
* MIPS: microMIPS: Add support for exception handling.Steven J. Hill2013-05-091-0/+1
* MIPS: microMIPS: Add instruction utility macros.Steven J. Hill2013-05-011-0/+18
* MIPS: Fix code generation for non-DSP capable CPUsFlorian Fainelli2013-03-191-19/+190
* Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j...Ralf Baechle2013-02-211-186/+125
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| * MIPS: Probe for and report hardware virtualization support.David Daney2013-02-191-0/+1
| * MIPS: dsp: Simplify the DSP macros.Steven J. Hill2013-02-171-201/+30
| * MIPS: dsp: Support toolchains without DSP ASE and microMIPS.Steven J. Hill2013-02-171-0/+89
| * MIPS: dsp: Add assembler support for DSP ASEs.Steven J. Hill2013-02-171-17/+36
| * MIPS: Add support for the M14KEc core.Steven J. Hill2013-02-171-0/+1
* | MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-199/+199
* | MIPS: Whitespace cleanups and reformatting.Steven J. Hill2013-02-011-11/+15
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* MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle2012-12-131-8/+0
* MIPS: Control huge tlb support via Kconfig symbol MIPS_HUGE_TLB_SUPPORTDavid Daney2012-12-121-1/+1
* MIPS: Add detection of DSP ASE Revision 2.Steven J. Hill2012-10-111-0/+1
* MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)Al Cooper2012-10-111-0/+2
* Merge branch 'ralf-3.7' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhi...Ralf Baechle2012-09-281-0/+2
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| * MIPS: Add support for the 1074K core.Steven J. Hill2012-09-131-0/+2
* | MIPS: Add base architecture support for RI and XI.Steven J. Hill2012-09-131-0/+1
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* MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operationsKevin Cernekee2011-12-071-1/+8
* MIPS: Add accessor macros for 64-bit performance counter registers.David Daney2011-10-241-0/+8
* Fix common misspellingsLucas De Marchi2011-03-311-2/+2
* MIPS: Add BMIPS CP0 register definitionsKevin Cernekee2010-10-291-0/+51
* MIPS: Define ST0_NMI in asm/mipsregs.hDavid Daney2010-08-051-0/+1
* MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1Shane McDonald2010-05-151-1/+8
* MIPS: Add accessor functions and bit definitions for c0_PageGrainDavid Daney2010-02-271-0/+11
* MIPS: Decode c0_config4 for large TLBs.David Daney2010-02-271-0/+4
* MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQsDavid VomLehn2010-01-281-0/+12
* MIPS: Add hugetlbfs page defines.David Daney2009-06-171-0/+16
* MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware.Ralf Baechle2009-05-141-4/+4
* MIPS: Cavium: Add support for 8k and 32k page sizes.Ralf Baechle2009-05-141-0/+11
* MIPS: SMTC: Bring set/clear/change_c0_## return value semantics uptodate.Kevin D. Kissell2009-05-141-8/+11
* MIPS: Change {set,clear,change}_c0_<foo> to return old value.Ralf Baechle2009-03-231-11/+11
* MIPS: Override assembler target architecture for octeon.David Daney2009-01-111-0/+2
* MIPS: Add Cavium OCTEON specific register definitions to mipsregs.hDavid Daney2009-01-111-0/+20
* MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processorsShinya Kuribayashi2008-10-271-0/+1
* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-111-0/+1526
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