summaryrefslogtreecommitdiffstats
path: root/arch/mips/kernel/cpu-probe.c
Commit message (Expand)AuthorAgeFilesLines
* MIPS: cpu-probe: remove MIPS_CPU_BP_GHIST option bitThomas Bogendoerfer2020-10-121-6/+4
* MIPS: cpu-probe: move fpu probing/handling into its own fileThomas Bogendoerfer2020-10-121-324/+2
* MIPS: cpu-probe: ingenic: Fix broken BUG_ONPaul Cercueil2020-09-181-1/+1
* MIPS: cpu-probe: Mark XBurst CPU as having vtagged cachesPaul Cercueil2020-09-181-0/+3
* MIPS: cpu-probe: Set Ingenic's writecombine to _CACHE_CACHABLE_WAPaul Cercueil2020-09-181-1/+2
* MIPS: handle Loongson-specific GSExc exceptionWANG Xuerui2020-07-311-0/+3
* MIPS: only register FTLBPar exception handler for supported modelsWANG Xuerui2020-07-311-0/+13
* MIPS: X2000: Add X2000 system type.周琰杰 (Zhou Yanjie)2020-07-241-0/+11
* MIPS: Unify naming style of vendor CP0.Config6 bitsHuacai Chen2020-07-081-6/+6
* KVM: MIPS: Enable KVM support for Loongson-3Huacai Chen2020-06-041-0/+1
* KVM: MIPS: Introduce and use cpu_guest_has_ldpteHuacai Chen2020-06-041-1/+3
* MIPS: emulate CPUCFG instruction on older Loongson64 coresWANG Xuerui2020-05-241-0/+9
* MIPS: Tidy up CP0.Config6 bits definitionHuacai Chen2020-05-241-6/+6
* mips: Add CP0 Write Merge config supportSerge Semin2020-05-221-0/+48
* mips: Add MIPS Release 5 supportSerge Semin2020-05-221-0/+17
* MIPS: Use fallthrough for arch/mipsLiangliang Huang2020-05-071-11/+11
* MIPS: Loongson64: Correct TLB type for Loongson-3 ClassicJiaxun Yang2020-05-021-1/+4
* MIPS: Loongson64: Probe CPU features via CPUCFGJiaxun Yang2020-04-301-8/+37
* MIPS: Kernel: Identify Loongson-2K processorsJiaxun Yang2020-04-261-1/+18
* Use ELF_BASE_PLATFORM to pass ISA levelYunQiang Su2020-03-191-0/+18
* MIPS: Add MAC2008 SupportJiaxun Yang2020-01-221-1/+15
* MIPS: X1830: Add X1830 system type.周琰杰 (Zhou Yanjie)2020-01-091-29/+36
* MIPS: Ingenic: Disable abandoned HPTLB function.Zhou Yanjie2019-11-221-2/+19
* MIPS: Loongson: Rename LOONGSON1 to LOONGSON32Huacai Chen2019-11-111-1/+1
* Merge tag 'mips_fixes_5.4_3' into mips-nextPaul Burton2019-11-011-0/+33
|\
| * MIPS: elf_hwcap: Export userspace ASEsJiaxun Yang2019-10-101-0/+33
* | MIPS: Loongson64: Rename CPU TYPESJiaxun Yang2019-10-311-8/+8
* | MIPS: Loongson: Add Loongson-3A R4 basic supportHuacai Chen2019-10-071-2/+14
|/
* MIPS: Treat Loongson Extensions as ASEsJiaxun Yang2019-08-261-0/+6
* MIPS: Ingenic: Disable broken BTB lookup optimization.Zhou Yanjie2019-08-051-0/+7
* MIPS: Remove unused R8000 CPU supportPaul Burton2019-07-231-9/+0
* MIPS: Remove unused R5432 CPU supportPaul Burton2019-07-231-8/+0
* MIPS: Remove unused R4300 CPU supportPaul Burton2019-07-231-9/+0
* MIPS: Decode config3 register on Ingenic SoCsPaul Cercueil2019-07-211-0/+8
* MIPS: Rename JZRISC to XBURSTPaul Cercueil2019-07-211-3/+3
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner2019-05-301-5/+1
* MIPS: Fix Ingenic SoCs sometimes reporting wrong ISAPaul Cercueil2019-05-091-0/+8
* MIPS: MemoryMapID (MMID) SupportPaul Burton2019-02-041-1/+54
* mips: annotate implicit fall throughsMathieu Malaterre2018-12-031-0/+7
* MIPS: Loongson: Add Loongson-3A R2.1 basic supportHuacai Chen2018-11-191-1/+2
* MIPS: cpu-probe: Avoid probing FPU when CONFIG_MIPS_FP_SUPPORT=nPaul Burton2018-11-091-13/+41
* MIPS: Loongson: Add Loongson-3A R3.1 basic supportHuacai Chen2018-07-231-1/+2
* MIPS: Probe for MIPS MT perf counters per TCMatt Redfearn2018-05-151-0/+12
* MIPS: Add crc instruction support flag to elf_hwcapMarcin Nowakowski2018-02-191-0/+3
* MIPS: Add CPU cluster number accessorsPaul Burton2017-08-301-0/+10
* MIPS: Store core & VP IDs in GlobalNumber-style variablePaul Burton2017-08-301-0/+22
* MIPS: Abstract CPU core & VP(E) ID access through accessor functionsPaul Burton2017-08-301-2/+5
* MIPS: Declare various variables & functions staticPaul Burton2017-08-291-1/+1
* MIPS: Remove unused R6000 supportPaul Burton2017-08-291-18/+0
* MIPS: MIPS16e2: Identify ASE presenceMaciej W. Rozycki2017-07-051-0/+2
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-25 11:17:34 +0000