Commit message (Expand) | Author | Age | Files | Lines | |
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* | riscv: dts: sophgo: add reserved memory node for CV1800B | Inochi Amaoto | 2024-04-23 | 1 | -0/+5 |
* | riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC | Inochi Amaoto | 2024-04-11 | 1 | -0/+4 |
* | riscv: dts: sophgo: Separate compatible specific for CV1800B soc | Inochi Amaoto | 2023-11-30 | 1 | -112/+7 |
* | riscv: dts: sophgo: add initial CV1800B SoC device tree | Jisheng Zhang | 2023-10-07 | 1 | -0/+123 |