summaryrefslogtreecommitdiffstats
path: root/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
Commit message (Expand)AuthorAgeFilesLines
* riscv: dts: sophgo: add reserved memory node for CV1800BInochi Amaoto2024-04-231-0/+5
* riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoCInochi Amaoto2024-04-111-0/+4
* riscv: dts: sophgo: Separate compatible specific for CV1800B socInochi Amaoto2023-11-301-112/+7
* riscv: dts: sophgo: add initial CV1800B SoC device treeJisheng Zhang2023-10-071-0/+123