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path: root/arch/riscv/include/asm/alternative.h
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* RISC-V: hwprobe: Remove __init on probe_vendor_features()Evan Green2023-04-251-1/+1
* Merge patch series "RISC-V Hardware Probing User Interface"Palmer Dabbelt2023-04-181-0/+5
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| * RISC-V: hwprobe: Support probing of misaligned access performanceEvan Green2023-04-181-0/+5
* | RISC-V: cpufeatures: Put the upper 16 bits of patch ID to workAndrew Jones2023-03-141-0/+4
* | riscv: alternatives: Rename errata_id to patch_idAndrew Jones2023-03-141-2/+2
* | riscv: alternatives: Remove unnecessary define and unused structAndrew Jones2023-03-141-7/+0
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* riscv: switch to relative alternative entriesJisheng Zhang2023-01-311-6/+11
* RISC-V: fix auipc-jalr addresses in patched alternativesHeiko Stuebner2022-12-291-0/+3
* riscv: add memory-type errata for T-HeadHeiko Stuebner2022-05-111-0/+6
* riscv: add RISC-V Svpbmt extension supportHeiko Stuebner2022-05-111-0/+3
* riscv: implement module alternativesHeiko Stuebner2022-05-111-0/+3
* riscv: allow different stages with alternativesHeiko Stuebner2022-05-111-1/+4
* riscv: integrate alternatives better into the main architectureHeiko Stuebner2022-05-111-0/+8
* riscv: sifive: Add SiFive alternative portsVincent Chen2021-04-261-0/+3
* riscv: Introduce alternative mechanism to apply errata solutionVincent Chen2021-04-261-0/+36
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