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path: root/arch/riscv/kernel/probes/simulate-insn.c
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* riscv: kprobes: allow writing to x0Nam Cao2023-11-051-1/+1
* riscv: kprobes: simulate c.beqz and c.bnezNam Cao2023-08-161-0/+44
* riscv: kprobes: simulate c.jr and c.jalr instructionsNam Cao2023-08-161-0/+37
* riscv: kprobes: simulate c.j instructionNam Cao2023-08-161-0/+24
* Merge patch series "dt-bindings: Add a cpu-capacity property for RISC-V"Palmer Dabbelt2023-02-141-2/+2
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| * riscv/kprobe: Fix instruction simulation of JALRLiao Chang2023-01-241-2/+2
* | RISC-V: kprobes: use central defined funct3 constantsHeiko Stuebner2022-12-291-13/+6
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* riscv: kprobes: implement the branch instructionsChen Lifu2021-07-211-0/+78
* riscv: kprobes: implement the auipc instructionChen Lifu2021-07-211-0/+34
* riscv: Add kprobes supportedGuo Ren2021-01-141-0/+85