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* Merge tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2021-02-261-5/+18
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| * riscv: Add machine name to kernel boot log and stack dump outputKefeng Wang2021-01-141-1/+8
| * riscv: Add numa support for riscv64 platformAtish Patra2021-01-141-2/+8
| * riscv: Separate memory init from paging initAtish Patra2021-01-141-0/+1
| * riscv: Cleanup sbi function stubs when RISCV_SBI disabledKefeng Wang2021-01-071-2/+1
* | RISC-V: Fix .init section permission updateAtish Patra2021-02-021-1/+3
* | RISC-V: Do not allocate memblock while iterating reserved memblocksAtish Patra2021-01-151-11/+13
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* Merge tag 'riscv-for-linus-5.11-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2020-12-181-4/+175
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| * RISC-V: Protect all kernel sections including init earlyAtish Patra2020-11-251-0/+12
| * RISC-V: Initialize SBI earlyAtish Patra2020-11-251-4/+3
| * RISC-V: Add kernel image sections to the resource treeNick Kossifidis2020-11-091-0/+160
* | RISC-V: Add missing jump label initializationAnup Patel2020-11-251-0/+1
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* treewide: Convert macro and uses of __section(foo) to __section("foo")Joe Perches2020-10-251-2/+2
* RISC-V: Add EFI runtime servicesAtish Patra2020-10-021-2/+5
* RISC-V: Add early ioremap supportAtish Patra2020-10-021-0/+2
* RISC-V: Move DT mapping outof fixmapAnup Patel2020-10-021-2/+7
* RISC-V: Remove CLINT related code from timer and archAnup Patel2020-08-201-2/+0
* mm: don't include asm/pgtable.h if linux/mm.h is already includedMike Rapoport2020-06-091-1/+0
* riscv: Allow device trees to be built into the kernelPalmer Dabbelt2020-05-181-0/+4
* RISC-V: Support cpu hotplugAtish Patra2020-03-311-1/+18
* RISC-V: Add basic support for SBI v0.2Atish Patra2020-03-311-0/+5
* riscv: force hart_lottery to put in .sdata sectionZong Li2020-03-031-2/+6
* Merge tag 'riscv-for-linus-5.6-mw0' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2020-01-311-0/+5
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| * riscv: Add KASAN supportNick Hu2020-01-221-0/+5
* | arch/riscv/setup: Drop dummy_con initializationArvind Sankar2020-01-141-4/+0
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* riscv: provide native clint access for M-modeChristoph Hellwig2019-11-171-0/+2
* riscv: add prototypes for assembly language functions from head.SPaul Walmsley2019-10-281-0/+2
* RISC-V: Setup initial page tables in two stagesAnup Patel2019-07-091-4/+2
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120Thomas Gleixner2019-05-241-14/+1
* riscv: cleanup the parse_dtb calling conventionsChristoph Hellwig2019-04-251-2/+4
* RISC-V: Always compile mm/init.c with cmodel=medany and notraceAnup Patel2019-03-261-8/+0
* RISC-V: Fixmap support and MM cleanupsPalmer Dabbelt2019-03-041-126/+4
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| * RISC-V: Move setup_vm() to mm/init.cAnup Patel2019-02-211-49/+0
| * RISC-V: Move setup_bootmem() to mm/init.cAnup Patel2019-02-211-72/+0
| * RISC-V: Setup init_mm before parse_early_param()Anup Patel2019-02-211-5/+4
* | arch: riscv: fix logic error in parse_dtbAndreas Schwab2019-03-041-1/+1
* | RISC-V: Move cpuid to hartid mapping to SMP.Atish Patra2019-03-041-9/+0
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* riscv: use pr_info and friendsJohan Hovold2019-02-111-3/+3
* riscv: fixup max_low_pfn with PFN_DOWN.Guo Ren2019-01-231-1/+1
* arch: riscv: support kernel command line forcing when no DTB passedPaul Walmsley2019-01-071-1/+8
* RISC-V: Remove EARLY_PRINTK supportAnup Patel2018-12-171-28/+0
* RISC-V: SMP cleanup and new featuresPalmer Dabbelt2018-10-221-0/+10
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| * RISC-V: Use Linux logical CPU number instead of hartidAtish Patra2018-10-221-0/+6
| * RISC-V: Add logical CPU indexing for RISC-VAtish Patra2018-10-221-0/+4
* | RISC-V: Use swiotlb on RV64 onlyZong Li2018-10-221-0/+3
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* RISCV: Fix end PFN for low memoryAtish Patra2018-10-021-1/+1
* riscv: Do not overwrite initrd_start and initrd_endGuenter Roeck2018-09-041-7/+0
* RISC-V: Add early printk support via the SBI consolePalmer Dabbelt2018-08-131-0/+27
* riscv: remove unnecessary of_platform_populate callRob Herring2018-07-041-5/+0
* riscv: add swiotlb supportChristoph Hellwig2018-05-191-0/+2
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