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* RISC-V: properly determine hardware capsAndreas Schwab2018-10-311-3/+5
* RISC-V: SMP cleanup and new featuresPalmer Dabbelt2018-10-227-47/+195
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| * RISC-V: Show IPI statsAnup Patel2018-10-222-7/+40
| * RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfoAnup Patel2018-10-221-4/+6
| * RISC-V: Use Linux logical CPU number instead of hartidAtish Patra2018-10-225-22/+45
| * RISC-V: Add logical CPU indexing for RISC-VAtish Patra2018-10-222-0/+23
| * RISC-V: Use WRITE_ONCE instead of direct accessAtish Patra2018-10-221-2/+3
| * RISC-V: Use mmgrab()Palmer Dabbelt2018-10-221-1/+2
| * RISC-V: Rename im_okay_therefore_i_am to found_boot_cpuPalmer Dabbelt2018-10-221-4/+5
| * RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartidPalmer Dabbelt2018-10-222-3/+6
| * RISC-V: Disable preemption before enabling interruptsAtish Patra2018-10-221-1/+5
| * RISC-V: Comment on the TLB flush in smp_callin()Palmer Dabbelt2018-10-221-0/+4
| * RISC-V: Filter ISA and MMU values in cpuinfoPalmer Dabbelt2018-10-221-7/+61
| * RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}Palmer Dabbelt2018-10-221-7/+0
| * RISC-V: No need to pass scause as arg to do_IRQ()Anup Patel2018-10-222-3/+2
* | RISC-V: Fix some RV32 bugs and build failuresPalmer Dabbelt2018-10-221-0/+3
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| * | RISC-V: Use swiotlb on RV64 onlyZong Li2018-10-221-0/+3
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* | riscv: Add support to no-FPU systemsPalmer Dabbelt2018-10-226-115/+168
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| * | Auto-detect whether a FPU existsAlan Kao2018-10-223-3/+15
| * | Allow to disable FPU supportAlan Kao2018-10-223-2/+9
| * | Refactor FPU code in signal setup/return proceduresAlan Kao2018-10-221-27/+41
| * | Extract FPU context operations from entry.SAlan Kao2018-10-223-87/+107
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* | RISC-V: remove the unused return_to_handler exportChristoph Hellwig2018-10-221-1/+0
* | RISC-V: Add FP register ptrace support for gdb.Jim Wilson2018-10-221-0/+52
* | RISC-V: Mask out the F extension on systems without DPalmer Dabbelt2018-10-221-0/+7
* | RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}Palmer Dabbelt2018-10-221-7/+0
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* RISCV: Fix end PFN for low memoryAtish Patra2018-10-021-1/+1
* riscv: Do not overwrite initrd_start and initrd_endGuenter Roeck2018-09-041-7/+0
* RISC-V: Use a less ugly workaround for unused variable warningsPalmer Dabbelt2018-08-281-14/+1
* RISC-V: Define sys_riscv_flush_icache when SMP=nPalmer Dabbelt2018-08-201-2/+10
* RISC-V: Fix !CONFIG_SMP compilation errorAtish Patra2018-08-131-1/+0
* RISC-V: Add the directive for alignment of stvec's valueZong Li2018-08-131-0/+2
* clocksource: new RISC-V SBI timer driverPalmer Dabbelt2018-08-133-9/+4
* RISC-V: implement low-level interrupt handlingChristoph Hellwig2018-08-132-11/+45
* RISC-V: simplify software interrupt / IPI codeChristoph Hellwig2018-08-131-4/+2
* RISC-V: remove timer leftoversChristoph Hellwig2018-08-131-21/+0
* RISC-V: Add early printk support via the SBI consolePalmer Dabbelt2018-08-131-0/+27
* RISC-V: Don't increment sepc after breakpoint.Jim Wilson2018-08-131-1/+0
* RISC-V: Use KBUILD_CFLAGS instead of KCFLAGS when building the vDSOPalmer Dabbelt2018-08-131-2/+2
* RISC-V: Fix the rv32i kernel buildPalmer Dabbelt2018-07-041-11/+11
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| * RISC-V: Change variable type for 32-bit compatibleZong Li2018-07-041-11/+11
* | RISC-V: Fix PTRACE_SETREGSET bug.Jim Wilson2018-07-041-1/+1
* | RISC-V: Don't include irq-riscv-intc.hPalmer Dabbelt2018-07-041-4/+0
* | riscv: remove unnecessary of_platform_populate callRob Herring2018-07-041-5/+0
* | RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocationsAndreas Schwab2018-07-041-2/+2
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* Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm...Linus Torvalds2018-06-166-3/+503
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| * RISC-V: Make our port sparse-cleanPalmer Dabbelt2018-06-112-2/+3
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| | * riscv: split the declaration of __copy_userLuc Van Oostenryck2018-06-091-1/+2
| | * riscv: no __user for probe_kernel_address()Luc Van Oostenryck2018-06-071-1/+1
| * | RISC-V: Handle R_RISCV_32 in modulesAndreas Schwab2018-06-111-0/+12
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