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path: root/arch/riscv/kvm/vcpu.c
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* RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config()Anup Patel2022-12-311-4/+7
* RISC-V: KVM: Fix kvm_riscv_vcpu_timer_pending() for SstcAnup Patel2022-10-211-0/+3
* RISC-V: KVM: Use generic guest entry infrastructureJisheng Zhang2022-10-021-12/+6
* RISC-V: KVM: Record number of signal exits as a vCPU statJisheng Zhang2022-10-021-0/+2
* RISC-V: KVM: Expose Zicbom to the guestAndrew Jones2022-10-021-2/+7
* RISC-V: KVM: Provide UAPI for Zicbom block sizeAndrew Jones2022-10-021-0/+8
* RISC-V: KVM: Make ISA ext mappings explicitAndrew Jones2022-10-021-11/+14
* RISC-V: KVM: Allow Guest use Zihintpause extensionMayuresh Chitale2022-10-021-0/+2
* RISC-V: KVM: Allow Guest use Svinval extensionAnup Patel2022-10-021-0/+2
* RISC-V: KVM: Support sstc extensionAtish Patra2022-08-121-1/+7
* RISC-V: KVM: Add support for Svpbmt inside Guest/VMAnup Patel2022-07-291-0/+16
* RISC-V: KVM: Add extensible CSR emulation frameworkAnup Patel2022-07-291-14/+20
* RISC-V: KVM: move preempt_disable() call in kvm_arch_vcpu_ioctl_runNikolay Borisov2022-07-291-3/+2
* RISC-V: KVM: Improve ISA extension by using a bitmapAtish Patra2022-07-291-51/+97
* RISC-V: KVM: Fix SRCU deadlock caused by kvm_riscv_check_vcpu_requests()Anup Patel2022-07-111-0/+2
* RISC-V: KVM: Introduce ISA extension registerAtish Patra2022-05-201-0/+99
* RISC-V: KVM: Cleanup stale TLB entries when host CPU changesAnup Patel2022-05-201-0/+11
* RISC-V: KVM: Add remote HFENCE functions based on VCPU requestsAnup Patel2022-05-201-2/+22
* RISC-V: KVM: Introduce range based local HFENCE functionsAnup Patel2022-05-201-1/+1
* RISC-V: KVM: Use G-stage name for hypervisor page tableAnup Patel2022-05-201-5/+5
* KVM: Add helpers to wrap vcpu->srcu_idx and yell if it's abusedSean Christopherson2022-04-211-8/+8
* KVM: RISC-V: Use kvm_vcpu.srcu_idx, drop RISC-V's unnecessary copySean Christopherson2022-04-211-8/+8
* RISC-V: KVM: Restrict the extensions that can be disabledAtish Patra2022-04-201-7/+12
* RISC-V: KVM: Remove 's' & 'u' as valid ISA extensionAtish Patra2022-04-201-3/+1
* RISC-V: KVM: Don't clear hgatp CSR in kvm_arch_vcpu_put()Anup Patel2022-04-091-2/+0
* RISC-V: KVM: make CY, TM, and IR counters accessible in VU modeMayuresh Chitale2022-02-021-0/+4
* kvm/riscv: rework guest entry logicMark Rutland2022-02-021-17/+27
* RISC-V: KVM: Add SBI HSM extension in KVMAtish Patra2022-01-061-0/+23
* KVM: RISC-V: Use common KVM implementation of MMU memory cachesSean Christopherson2022-01-061-2/+3
* Documentation: update vcpu-requests.rst referenceMauro Carvalho Chehab2021-11-171-1/+1
* RISC-V: KVM: remove unneeded semicolonran jianping2021-11-011-2/+2
* RISC-V: KVM: Factor-out FP virtualization into separate sourcesAnup Patel2021-10-311-172/+0
* RISC-V: KVM: Add SBI v0.1 supportAtish Patra2021-10-041-0/+9
* RISC-V: KVM: Implement ONE REG interface for FP registersAtish Patra2021-10-041-0/+104
* RISC-V: KVM: FP lazy save/restoreAtish Patra2021-10-041-0/+91
* RISC-V: KVM: Add timer functionalityAtish Patra2021-10-041-0/+14
* RISC-V: KVM: Implement VMID allocatorAnup Patel2021-10-041-0/+9
* RISC-V: KVM: Implement VCPU world-switchAnup Patel2021-10-041-2/+28
* RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctlsAnup Patel2021-10-041-3/+238
* RISC-V: KVM: Implement VCPU interrupts and requests handlingAnup Patel2021-10-041-13/+171
* RISC-V: KVM: Implement VCPU create, init and destroy functionsAnup Patel2021-10-041-9/+46
* RISC-V: Add initial skeletal KVM supportAnup Patel2021-10-041-0/+314
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