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* riscv: Add support to dump the kernel page tablesZong Li2020-03-261-0/+1
* riscv: add ARCH_HAS_SET_MEMORY supportZong Li2020-03-261-1/+1
* riscv: mm: add support for CONFIG_DEBUG_VIRTUALZong Li2020-01-231-0/+2
* riscv: Add KASAN supportNick Hu2020-01-221-0/+6
* riscv: move sifive_l2_cache.c to drivers/socChristoph Hellwig2019-12-201-1/+0
* Merge tag 'ioremap-5.5' of git://git.infradead.org/users/hch/ioremapLinus Torvalds2019-11-281-1/+1
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| * riscv: use the generic ioremap codeChristoph Hellwig2019-11-111-1/+0
* | riscv: add nommu supportChristoph Hellwig2019-11-171-2/+1
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* riscv: move the TLB flush logic out of lineChristoph Hellwig2019-09-051-0/+3
* riscv: Introduce huge page support for 32/64bit kernelAlexandre Ghiti2019-07-031-0/+2
* treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2019-05-211-0/+1
* RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCsYash Shah2019-05-161-0/+1
* riscv: move switch_mm to its own fileGary Guo2019-05-161-0/+1
* RISC-V: Always compile mm/init.c with cmodel=medany and notraceAnup Patel2019-03-261-0/+6
* RISC-V: Flush I$ when making a dirty page executableAndrew Waterman2017-11-301-0/+1
* RISC-V: Build InfrastructurePalmer Dabbelt2017-09-261-0/+4
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