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path: root/arch/riscv/mm/extable.c
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* riscv: select DCACHE_WORD_ACCESS for efficient unaligned access HWJisheng Zhang2024-01-091-0/+31
* riscv: extable: fix err reg writing in dedicated uaccess handlerJisheng Zhang2022-02-081-3/+3
* riscv: extable: add a dedicated uaccess handlerJisheng Zhang2022-01-051-0/+27
* riscv: extable: add `type` and `data` fieldsJisheng Zhang2022-01-051-4/+21
* riscv: extable: use `ex` for `exception_table_entry`Jisheng Zhang2022-01-051-5/+5
* riscv: extable: make fixup_exception() return boolJisheng Zhang2022-01-051-3/+3
* riscv: bpf: move rv_bpf_fixup_exception signature to extable.hJisheng Zhang2022-01-051-6/+0
* riscv: switch to relative exception tablesJisheng Zhang2022-01-051-1/+1
* riscv, bpf: Fix RV32 broken build, and silence RV64 warningBjörn Töpel2021-11-051-2/+2
* riscv, bpf: Add BPF exception tablesTong Tiangen2021-10-281-5/+14
* riscv: abstract out CSR names for supervisor vs machine modeChristoph Hellwig2019-11-051-2/+2
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120Thomas Gleixner2019-05-241-14/+1
* RISC-V: ELF and module implementationPalmer Dabbelt2017-09-261-0/+37
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