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linux-rolling-lts
linux-rolling-stable
master
Linux kernel stable tree
Greg Kroah-Hartman
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path:
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riscv
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mm
Commit message (
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Author
Age
Files
Lines
*
riscv: mm: add support for CONFIG_DEBUG_VIRTUAL
Zong Li
2020-01-23
2
-0
/
+39
*
riscv: Add KASAN support
Nick Hu
2020-01-22
2
-0
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+110
*
riscv: mm: use __pa_symbol for kernel symbols
Zong Li
2020-01-03
1
-6
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+6
*
riscv: export flush_icache_all to modules
Olof Johansson
2019-12-27
1
-0
/
+1
*
riscv: move sifive_l2_cache.c to drivers/soc
Christoph Hellwig
2019-12-20
2
-179
/
+0
*
Merge tag 'riscv/for-v5.5-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds
2019-12-04
1
-0
/
+32
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*
Merge branch 'next/misc2' into for-next
Paul Walmsley
2019-11-22
1
-0
/
+32
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*
RISC-V: Add address map dumper
Yash Shah
2019-11-22
1
-0
/
+32
*
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Merge tag 'ioremap-5.5' of git://git.infradead.org/users/hch/ioremap
Linus Torvalds
2019-11-28
2
-85
/
+1
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riscv: use the generic ioremap code
Christoph Hellwig
2019-11-11
2
-85
/
+0
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*
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Merge branch 'next/nommu' into for-next
Paul Walmsley
2019-11-22
6
-15
/
+41
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riscv: add nommu support
Christoph Hellwig
2019-11-17
4
-4
/
+18
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*
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riscv: implement remote sfence.i using IPIs
Christoph Hellwig
2019-11-13
1
-6
/
+18
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*
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riscv: abstract out CSR names for supervisor vs machine mode
Christoph Hellwig
2019-11-05
2
-5
/
+5
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*
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Merge branch 'next/misc' into for-next
Paul Walmsley
2019-11-22
1
-9
/
+4
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*
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riscv: Use PMD_SIZE to replace PTE_PARENT_SIZE
Zong Li
2019-11-12
1
-9
/
+4
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*
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RISC-V: Issue a tlb page flush if possible
Atish Patra
2019-10-29
1
-1
/
+4
*
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RISC-V: Issue a local tlbflush if possible.
Atish Patra
2019-10-29
1
-2
/
+17
*
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RISC-V: Do not invoke SBI call if cpumask is empty
Atish Patra
2019-10-29
1
-0
/
+3
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/
*
riscv: add missing header file includes
Paul Walmsley
2019-10-28
1
-0
/
+1
*
riscv: mark some code and data as file-static
Paul Walmsley
2019-10-28
1
-1
/
+1
*
riscv: init: merge split string literals in preprocessor directive
Paul Walmsley
2019-10-28
1
-2
/
+1
*
riscv: add prototypes for assembly language functions from head.S
Paul Walmsley
2019-10-28
2
-0
/
+4
*
riscv: Fix undefined reference to vmemmap_populate_basepages
Kefeng Wang
2019-10-23
1
-1
/
+1
*
riscv: Fix memblock reservation for device tree blob
Albert Ou
2019-10-01
1
-1
/
+11
*
riscv: move the TLB flush logic out of line
Christoph Hellwig
2019-09-05
2
-0
/
+38
*
riscv: cleanup riscv_cpuid_to_hartid_mask
Christoph Hellwig
2019-09-05
1
-1
/
+0
*
RISC-V: Implement sparsemem
Logan Gunthorpe
2019-08-30
1
-0
/
+10
*
riscv: Using CSR numbers to access CSRs
Bin Meng
2019-08-30
2
-7
/
+2
*
Merge tag 'riscv/for-v5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...
Linus Torvalds
2019-07-18
4
-68
/
+315
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*
RISC-V: Setup initial page tables in two stages
Anup Patel
2019-07-09
1
-52
/
+255
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*
riscv: remove free_initrd_mem
Christoph Hellwig
2019-07-04
1
-5
/
+0
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*
riscv: ccache: Remove unused variable
Yash Shah
2019-07-04
1
-4
/
+7
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*
riscv: Introduce huge page support for 32/64bit kernel
Alexandre Ghiti
2019-07-03
2
-0
/
+46
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*
RISC-V: Fix memory reservation in setup_bootmem()
Anup Patel
2019-07-01
1
-7
/
+7
*
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Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds
2019-07-08
1
-3
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+3
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*
signal/riscv: Remove tsk parameter from do_trap
Eric W. Biederman
2019-05-29
1
-3
/
+3
*
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riscv: mm: Fix code comment
ShihPo Hung
2019-06-26
1
-3
/
+0
*
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Merge tag 'riscv-for-v5.2/fixes-rc6' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
2019-06-17
1
-0
/
+13
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*
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riscv: mm: synchronize MMU after pte change
ShihPo Hung
2019-06-17
1
-0
/
+13
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*
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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
Thomas Gleixner
2019-06-05
3
-27
/
+3
*
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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120
Thomas Gleixner
2019-05-24
2
-28
/
+2
*
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treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
2019-05-21
1
-0
/
+1
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/
*
Merge tag 'riscv-for-linus-5.2-mw2' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
2019-05-19
5
-6
/
+310
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*
riscv: fix locking violation in page fault handler
Andreas Schwab
2019-05-16
1
-1
/
+2
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*
RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs
Yash Shah
2019-05-16
2
-0
/
+176
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*
riscv: move switch_mm to its own file
Gary Guo
2019-05-16
2
-0
/
+70
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*
riscv: move flush_icache_{all,mm} to cacheflush.c
Gary Guo
2019-05-16
1
-0
/
+61
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*
RISC-V: Access CSRs using CSR numbers
Anup Patel
2019-05-16
1
-5
/
+1
*
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riscv: switch over to generic free_initmem()
Mike Rapoport
2019-05-14
1
-5
/
+0
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/
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