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* riscv: mm: init: make pt_ops_set_[early|late|fixmap] staticJisheng Zhang2022-06-021-3/+3
* riscv: Improve virtual kernel memory layout dumpAlexandre Ghiti2022-06-011-15/+51
* Merge tag 'riscv-for-linus-5.19-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2022-05-312-11/+8
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| * RISC-V: Various XIP fixesPalmer Dabbelt2022-05-261-4/+4
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| | * RISC-V: Fix the XIP buildPalmer Dabbelt2022-05-251-1/+1
| | * RISC-V: Avoid empty create_*_mapping definitionsPalmer Dabbelt2022-05-241-3/+3
| * | riscv: support for Svpbmt and D1 memory typesPalmer Dabbelt2022-05-121-0/+1
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| | * | riscv: add memory-type errata for T-HeadHeiko Stuebner2022-05-111-0/+1
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| * / riscv: mm: Remove the copy operation of pmdChuanhua Han2022-04-201-7/+3
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* | Merge tag 'dma-mapping-5.19-2022-05-25' of git://git.infradead.org/users/hch/...Linus Torvalds2022-05-251-7/+1
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| * | swiotlb: make the swiotlb_init interface more usefulChristoph Hellwig2022-04-181-7/+1
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* | RISC-V: relocate DTB if it's outside memory regionNick Kossifidis2022-04-291-2/+19
* | RISC-V: mm: Fix set_satp_mode() for platform not having Sv57Anup Patel2022-04-211-0/+1
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* Merge tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2022-03-252-37/+286
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| * RISC-V: Add Sv57 page table supportPalmer Dabbelt2022-02-222-36/+285
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| | * riscv: mm: Support kasan for sv57Qinglin Pan2022-02-141-14/+141
| | * riscv: mm: Set sv57 on defaultlyQinglin Pan2022-02-141-8/+27
| | * riscv: mm: Prepare pt_ops helper functions for sv57Qinglin Pan2022-02-141-15/+116
| | * riscv: mm: Control p4d's folding by pgtable_l5_enabledQinglin Pan2022-02-141-0/+2
| * | riscv: mm: init: mark satp_mode __ro_after_initJisheng Zhang2022-02-141-2/+2
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* | riscv: mm: init: use IS_ENABLED(CONFIG_KEXEC_CORE) instead of #ifdefJisheng Zhang2022-03-231-4/+2
* | riscv: Fix kasan pud populationAlexandre Ghiti2022-03-031-1/+4
* | riscv: Move high_memory initialization to setup_bootmemAlexandre Ghiti2022-03-031-1/+1
* | riscv: Fix config KASAN && DEBUG_VIRTUALAlexandre Ghiti2022-03-031-0/+3
* | riscv: Fix DEBUG_VIRTUAL false warningsAlexandre Ghiti2022-03-031-3/+1
* | riscv: Fix config KASAN && SPARSEMEM && !SPARSE_VMEMMAPAlexandre Ghiti2022-03-031-2/+1
* | riscv: extable: fix err reg writing in dedicated uaccess handlerJisheng Zhang2022-02-081-3/+3
* | riscv/mm: Add XIP_FIXUP for riscv_pfn_basePalmer Dabbelt2022-02-041-0/+1
* | riscv/mm: Add XIP_FIXUP for phys_ram_basePalmer Dabbelt2022-02-041-0/+1
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* RISC-V: Do not use cpumask data structure for hartid bitmapAtish Patra2022-01-202-11/+3
* riscv: fix boolconv.cocci warningskernel test robot2022-01-191-2/+1
* RISC-V: Introduce sv48 support without relocatable kernelPalmer Dabbelt2022-01-193-118/+459
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| * riscv: Implement sv48 supportAlexandre Ghiti2022-01-193-32/+321
| * riscv: Introduce functions to switch pt_opsAlexandre Ghiti2022-01-191-23/+51
| * riscv: Split early kasan mapping to prepare sv48 introductionAlexandre Ghiti2022-01-192-51/+66
| * riscv: Move KASAN mapping next to the kernel mappingAlexandre Ghiti2022-01-191-12/+13
* | riscv: mm: init: try best to remove #ifdef CONFIG_XIP_KERNEL usageJisheng Zhang2022-01-191-8/+3
* | riscv: mm: init: try IS_ENABLED(CONFIG_XIP_KERNEL) instead of #ifdefJisheng Zhang2022-01-191-9/+7
* | riscv: mm: init: remove _pt_ops and use pt_ops directlyJisheng Zhang2022-01-191-4/+2
* | riscv: mm: init: try best to use IS_ENABLED(CONFIG_64BIT) instead of #ifdefJisheng Zhang2022-01-191-27/+16
* | riscv: mm: init: remove unnecessary "#ifdef CONFIG_CRASH_DUMP"Jisheng Zhang2022-01-191-2/+0
* | Merge tag 'riscv-for-linus-5.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2022-01-193-21/+69
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| * | riscv: mm: fix wrong phys_ram_base value for RV64Jisheng Zhang2022-01-091-1/+1
| * | riscv: try to allocate crashkern region from 32bit addressible memoryNick Kossifidis2022-01-091-4/+13
| * | riscv: mm: Enable PMD split page table lock for RV64Kefeng Wang2022-01-051-1/+2
| * | riscv: Make vmalloc/vmemmap end equal to the start of the next regionAlexandre Ghiti2022-01-051-1/+1
| * | riscv: extable: add a dedicated uaccess handlerJisheng Zhang2022-01-051-0/+27
| * | riscv: extable: add `type` and `data` fieldsJisheng Zhang2022-01-051-4/+21
| * | riscv: extable: use `ex` for `exception_table_entry`Jisheng Zhang2022-01-051-5/+5
| * | riscv: extable: make fixup_exception() return boolJisheng Zhang2022-01-051-3/+3
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