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linux-stable.git
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linux-2.6.28.y
linux-2.6.29.y
linux-2.6.30.y
linux-2.6.31.y
linux-2.6.32.y
linux-2.6.33.y
linux-2.6.34.y
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linux-rolling-lts
linux-rolling-stable
master
Linux kernel stable tree
Greg Kroah-Hartman
summary
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path:
root
/
arch
/
riscv
Commit message (
Expand
)
Author
Age
Files
Lines
*
bpf: Use arch_bpf_trampoline_size
Song Liu
2023-12-06
1
-7
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+0
*
bpf: Add arch_bpf_trampoline_size()
Song Liu
2023-12-06
1
-5
/
+17
*
Merge tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
2023-11-10
81
-683
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+2509
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*
riscv: Optimize bitops with Zbb extension
Xiao Wang
2023-11-09
1
-3
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+251
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*
riscv: Rearrange hwcap.h and cpufeature.h
Xiao Wang
2023-11-09
12
-100
/
+93
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*
Merge patch "drivers: perf: Do not broadcast to other cpus when starting a co...
Palmer Dabbelt
2023-11-09
9
-35
/
+67
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*
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Merge patch series "Linux RISC-V AIA Preparatory Series"
Palmer Dabbelt
2023-11-08
1
-5
/
+6
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\
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*
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RISC-V: Don't fail in riscv_of_parent_hartid() for disabled HARTs
Anup Patel
2023-11-08
1
-5
/
+6
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*
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Merge patch series "riscv: Fix set_memory_XX() and set_direct_map_XX()"
Palmer Dabbelt
2023-11-08
2
-46
/
+236
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*
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riscv: Fix set_memory_XX() and set_direct_map_XX() by splitting huge linear m...
Alexandre Ghiti
2023-11-08
1
-40
/
+230
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*
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riscv: Don't use PGD entries for the linear mapping
Alexandre Ghiti
2023-11-08
1
-6
/
+6
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/
/
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*
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RISC-V: Probe misaligned access speed in parallel
Evan Green
2023-11-07
3
-21
/
+77
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*
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RISC-V: Remove __init on unaligned_emulation_finish()
Evan Green
2023-11-07
1
-1
/
+1
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*
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RISC-V: Show accurate per-hart isa in /proc/cpuinfo
Evan Green
2023-11-07
1
-4
/
+18
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*
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RISC-V: Don't rely on positional structure initialization
Palmer Dabbelt
2023-11-07
1
-60
/
+65
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*
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Merge patch series "riscv: Add remaining module relocations and tests"
Palmer Dabbelt
2023-11-07
18
-105
/
+869
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*
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riscv: Add tests for riscv module loading
Charlie Jenkins
2023-11-07
16
-0
/
+366
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*
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riscv: Add remaining module relocations
Charlie Jenkins
2023-11-07
2
-30
/
+423
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*
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riscv: Avoid unaligned access when relocating modules
Emil Renner Berthing
2023-11-07
1
-76
/
+81
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/
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*
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riscv: split cache ops out of dma-noncoherent.c
Christoph Hellwig
2023-11-07
3
-15
/
+18
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*
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riscv: select ARCH_PROC_KCORE_TEXT
Andreas Schwab
2023-11-06
1
-0
/
+3
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*
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riscv: kernel: Use correct SYM_DATA_*() macro for data
Clément Léger
2023-11-06
1
-5
/
+4
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*
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riscv: Use SYM_*() assembly macros instead of deprecated ones
Clément Léger
2023-11-06
17
-74
/
+60
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*
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riscv: use ".L" local labels in assembly when applicable
Clément Léger
2023-11-06
4
-44
/
+44
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*
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riscv: boot: Fix creation of loader.bin
Geert Uytterhoeven
2023-11-06
1
-0
/
+1
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*
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Merge patch series "riscv: tlb flush improvements"
Palmer Dabbelt
2023-11-06
5
-95
/
+144
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*
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riscv: Improve flush_tlb_kernel_range()
Alexandre Ghiti
2023-11-06
2
-15
/
+30
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*
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riscv: Make __flush_tlb_range() loop over pte instead of flushing the whole tlb
Alexandre Ghiti
2023-11-06
4
-81
/
+72
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*
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riscv: Improve flush_tlb_range() for hugetlb pages
Alexandre Ghiti
2023-11-06
1
-1
/
+28
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*
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riscv: Improve tlb_flush()
Alexandre Ghiti
2023-11-06
3
-1
/
+17
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/
/
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*
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riscv: mm: update T-Head memory type definitions
Jisheng Zhang
2023-11-05
1
-5
/
+9
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*
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Merge patch series "riscv: vdso.lds.S: some improvement"
Palmer Dabbelt
2023-11-05
1
-17
/
+13
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\
\
\
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*
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riscv: vdso.lds.S: remove hardcoded 0x800 .text start addr
Jisheng Zhang
2023-11-05
1
-9
/
+8
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*
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riscv: vdso.lds.S: merge .data section into .rodata section
Jisheng Zhang
2023-11-05
1
-8
/
+7
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*
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riscv: vdso.lds.S: drop __alt_start and __alt_end symbols
Jisheng Zhang
2023-11-05
1
-2
/
+0
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/
/
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*
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riscv: add userland instruction dump to RISC-V splats
Yunhui Cui
2023-11-05
1
-3
/
+18
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*
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riscv: kprobes: allow writing to x0
Nam Cao
2023-11-05
1
-1
/
+1
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*
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riscv: provide riscv-specific is_trap_insn()
Nam Cao
2023-11-05
1
-0
/
+6
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*
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Merge patch series "Improve PTDUMP and introduce new fields"
Palmer Dabbelt
2023-11-05
2
-21
/
+36
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\
\
\
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*
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riscv: Introduce NAPOT field to PTDUMP
Yu Chien Peter Lin
2023-11-05
1
-0
/
+4
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*
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riscv: Introduce PBMT field to PTDUMP
Yu Chien Peter Lin
2023-11-05
1
-0
/
+16
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*
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riscv: Improve PTDUMP to show RSW with non-zero value
Yu Chien Peter Lin
2023-11-05
2
-22
/
+17
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/
/
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*
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RISC-V: capitalise CMO op macros
Conor Dooley
2023-11-05
5
-29
/
+29
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*
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riscv: don't probe unaligned access speed if already done
Jisheng Zhang
2023-11-05
1
-0
/
+4
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*
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riscv: defconfig : add CONFIG_MMC_DW for starfive
Jinyu Tang
2023-11-05
1
-0
/
+2
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*
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riscv: signal: handle syscall restart before get_signal
Haorong Lu
2023-11-05
1
-39
/
+46
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*
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Merge patch series "Add support to handle misaligned accesses in S-mode"
Palmer Dabbelt
2023-11-05
11
-59
/
+524
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\
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*
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riscv: add support for PR_SET_UNALIGN and PR_GET_UNALIGN
Clément Léger
2023-11-01
3
-0
/
+33
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*
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riscv: report misaligned accesses emulation to hwprobe
Clément Léger
2023-11-01
4
-1
/
+79
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*
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riscv: annotate check_unaligned_access_boot_cpu() with __init
Clément Léger
2023-11-01
1
-1
/
+1
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