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path: root/arch/sh/kernel/cpu/init.c
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* sh: remove sh5 supportArnd Bergmann2020-06-011-1/+1
* sh: cpu: convert to SPDX identifiersKuninori Morimoto2018-12-281-4/+1
* Replace <asm/uaccess.h> with <linux/uaccess.h> globallyLinus Torvalds2016-12-241-1/+1
* sh: add support for J-Core J2 processorRich Felker2016-08-051-1/+1
* sh: disable aliased page logic on NOMMU modelsRich Felker2016-07-311-0/+4
* sh: prefix sh-specific "CCR" and "CCR2" by "SH_"Geert Uytterhoeven2014-03-041-2/+2
* sh: delete __cpuinit usage from all sh filesPaul Gortmaker2013-07-141-9/+9
* Disintegrate asm/system.h for SHDavid Howells2012-03-281-1/+1
* sh: Expose physical addressing mode through cpuinfo.Paul Mundt2010-10-261-0/+2
* sh: __cpuinit annotate the CPU init path.Paul Mundt2010-04-211-10/+10
* sh: Tidy CPU probing and fixup section annotations.Paul Mundt2010-04-211-2/+2
* sh: Setup boot CPU VBR early to enable early page faults.Paul Mundt2010-02-171-4/+17
* sh: Mass ctrl_in/outX to __raw_read/writeX conversion.Paul Mundt2010-01-261-5/+5
* sh: Kill off the special uncached section and fixmap.Paul Mundt2010-01-211-2/+2
*-. Merge branches 'sh/xstate', 'sh/hw-breakpoints' and 'sh/stable-updates'Paul Mundt2010-01-131-43/+55
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| | * sh: Kill off dead UBC headers.Paul Mundt2010-01-051-12/+8
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| * sh: Move over to dynamically allocated FPU context.Paul Mundt2010-01-131-32/+48
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* sh: Make associative cache writes fatal on all SH-4A parts.Paul Mundt2009-12-041-9/+4
* sh: Minor optimisations to FPU handlingStuart Menefy2009-11-241-2/+2
* sh: Kill off legacy UBC wakeup cruft.Paul Mundt2009-10-161-11/+0
* Merge branch 'master' into sh/cachetlbPaul Mundt2009-08-191-1/+33
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| * sh: delay slot future proofing via EXPMASK on SH-4A parts.Paul Mundt2009-08-151-1/+33
* | sh: rework nommu for generic cache.c use.Paul Mundt2009-08-151-2/+0
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* sh: add weak l2_cache_init function.Kuninori Morimoto2009-06-021-0/+7
* sh: Move arch_get_unmapped_area() in to arch/sh/mm/mmap.c.Paul Mundt2008-12-221-0/+2
* sh: Fix up section mismatches.Paul Mundt2008-03-061-1/+1
* sh: Encode L1/L2 cache shape in auxvt.Paul Mundt2008-01-281-1/+28
* sh: Preparation for uncached jumps through PMB.Stuart Menefy2008-01-281-3/+3
* sh: Disable initial cache flush on SH-5.Paul Mundt2008-01-281-14/+18
* sh: Don't reference UBC code in CPU init on sh64.Paul Mundt2008-01-281-1/+6
* sh: Bring SMP support back from the dead.Paul Mundt2007-09-211-5/+11
* sh: Support explicit L1 cache disabling.Paul Mundt2007-09-211-4/+7
* sh: Tidy up dependencies for SH-2 build.Paul Mundt2007-06-111-14/+1
* sh: speculative execution support for SH7780.Paul Mundt2007-05-071-0/+19
* sh: Fix SH-3 cache entry_mask and way_size calculation.Paul Mundt2007-03-121-3/+17
* sh: Fixup cpu_data references for the non-boot CPUs.Paul Mundt2007-02-131-15/+15
* sh: Use a per-cpu ASID cache.Paul Mundt2007-02-131-2/+9
* sh: Add support for SH7206 and SH7619 CPU subtypes.Yoshinori Sato2006-12-061-0/+2
* sh: Calculate shm alignment at runtime.Paul Mundt2006-09-271-0/+5
* sh: Optimized cache handling for SH-4/SH-4A caches.Richard Curnow2006-09-271-1/+15
* [PATCH] Don't pass boot parameters to argv_init[]OGAWA Hirofumi2006-03-311-1/+1
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+222