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path: root/arch/x86/events/intel/lbr.c
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* Merge tag 'x86-cpu-2024-05-13' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2024-05-131-1/+2
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| * perf/x86/lbr: Switch to new Intel CPU model definesTony Luck2024-04-251-1/+2
* | perf/x86/intel: Expose existence of callback support to KVMSean Christopherson2024-04-111-0/+1
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* perf/x86/intel: Support branch counters loggingKan Liang2023-10-271-1/+84
* perf/x86/lbr: Simplify the exposure check for the LBR_INFO registersLike Xu2022-12-271-3/+1
* Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2022-12-151-5/+1
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| * perf/x86/core: Zero @lbr instead of returning -1 in x86_perf_get_lbr() stubSean Christopherson2022-11-091-5/+1
* | perf: Rewrite core context handlingPeter Zijlstra2022-10-271-15/+15
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* perf/x86/intel/lbr: Use setup_clear_cpu_cap() instead of clear_cpu_cap()Maxim Levitsky2022-10-201-1/+1
* Merge branch 'v6.0-rc7'Peter Zijlstra2022-09-291-0/+8
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| * perf/x86/lbr: Enable the branch type for the Arch LBR by defaultKan Liang2022-08-191-0/+8
* | perf/x86: Move branch classifierSandipan Das2022-08-271-273/+0
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* perf/x86/intel/lbr: Fix unchecked MSR access error on HSWKan Liang2022-07-201-9/+10
* perf/core: Add perf_clear_branch_entry_bitfields() helperStephane Eranian2022-04-051-19/+17
* perf: Add irq and exception return branch typesAnshuman Khandual2022-03-011-2/+2
* x86/perf: Avoid warning for Arch LBR without XSAVEAndi Kleen2022-01-181-0/+3
* perf/x86/intel/lbr: Add static_branch for LBR INFO flagsPeter Zijlstra (Intel)2022-01-181-17/+34
* perf/x86/intel/lbr: Support LBR format V7Peter Zijlstra (Intel)2022-01-181-50/+64
* perf/x86/lbr: Reset LBR_SELECT during vlbr resetWanpeng Li2021-11-111-0/+2
* perf: Enable branch record for software eventsSong Liu2021-09-131-15/+5
* Merge tag 'x86-fpu-2021-07-07' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2021-07-071-3/+3
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| * x86/fpu/xstate: Sanitize handling of independent featuresThomas Gleixner2021-06-231-3/+3
| * x86/fpu: Rename "dynamic" XSTATEs to "independent"Andy Lutomirski2021-06-231-3/+3
* | perf/x86/intel/lbr: Zero the xstate buffer on allocationThomas Gleixner2021-06-241-1/+2
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* perf/x86/lbr: Remove cpuc->lbr_xsave allocation from atomic contextLike Xu2021-05-181-6/+20
* Merge tag 'perf-core-2021-04-28' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2021-04-281-4/+5
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| * perf/x86: Track pmu in per-CPU cpu_hw_eventsKan Liang2021-04-191-4/+5
* | Merge tag 'x86_core_for_v5.13' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2021-04-271-5/+5
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| * | perf/x86/intel/ds: Check return values of insn decoder functionsBorislav Petkov2021-03-151-5/+5
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* / x86: Fix various typos in commentsIngo Molnar2021-03-181-1/+1
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* Merge tag 'perf-core-2020-12-14' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2020-12-141-1/+1
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| * perf/x86/intel/lbr: Fix the return type of get_lbr_cycles()Kan Liang2020-12-091-1/+1
* | perf/x86: Avoid TIF_IA32 when checking 64bit modeGabriel Krisman Bertazi2020-10-261-1/+1
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* treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva2020-08-231-1/+1
* perf/x86/intel/lbr: Support XSAVES for arch LBR readKan Liang2020-07-081-1/+39
* perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switchKan Liang2020-07-081-5/+74
* perf/x86: Remove task_ctx_sizeKan Liang2020-07-081-1/+0
* perf/x86/intel/lbr: Create kmem_cache for the LBR context dataKan Liang2020-07-081-2/+19
* perf/x86/intel/lbr: Support Architectural LBRKan Liang2020-07-081-11/+240
* perf/x86/intel/lbr: Factor out intel_pmu_store_lbrKan Liang2020-07-081-26/+56
* perf/x86/intel/lbr: Factor out rdlbr_all() and wrlbr_all()Kan Liang2020-07-081-16/+50
* perf/x86/intel/lbr: Mark the {rd,wr}lbr_{to,from} wrappers __always_inlineKan Liang2020-07-081-4/+4
* perf/x86/intel/lbr: Unify the stored format of LBR informationKan Liang2020-07-081-10/+10
* perf/x86/intel/lbr: Support LBR_CTLKan Liang2020-07-081-0/+43
* perf/x86/intel/lbr: Use dynamic data structure for task_ctxKan Liang2020-07-081-33/+26
* perf/x86/intel/lbr: Factor out a new struct for generic optimizationKan Liang2020-07-081-17/+21
* perf/x86/intel/lbr: Add the function pointers for LBR save and restoreKan Liang2020-07-081-30/+49
* perf/x86/intel/lbr: Add a function pointer for LBR readKan Liang2020-07-081-6/+3
* perf/x86/intel/lbr: Add a function pointer for LBR resetKan Liang2020-07-081-17/+3
* perf/x86: Keep LBR records unchanged in host context for guest usageLike Xu2020-07-021-5/+26
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