summaryrefslogtreecommitdiffstats
path: root/arch/x86/events
Commit message (Expand)AuthorAgeFilesLines
* Merge tag 'perf-urgent-2021-07-11' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds2021-07-112-8/+21
|\
| * perf/x86/intel/uncore: Clean up error handling path of iio mappingKan Liang2021-07-021-2/+4
| * perf/x86/cstate: Add ICELAKE_X and ICELAKE_D supportZhang Rui2021-07-021-6/+17
* | Merge tag 'x86-fpu-2021-07-07' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2021-07-071-3/+3
|\ \
| * | x86/fpu/xstate: Sanitize handling of independent featuresThomas Gleixner2021-06-231-3/+3
| * | x86/fpu: Rename "dynamic" XSTATEs to "independent"Andy Lutomirski2021-06-231-3/+3
* | | Merge tag 'perf-core-2021-06-28' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2021-06-287-20/+222
|\ \ \
| * | | perf/x86/intel: Fix instructions:ppp support in Sapphire RapidsKan Liang2021-06-231-1/+3
| * | | perf/x86/intel: Add more events requires FRONTEND MSR on Sapphire RapidsKan Liang2021-06-231-0/+2
| * | | perf/x86/intel: Fix fixed counter check warning for some Alder LakeKan Liang2021-06-231-2/+7
| * | | perf/x86/intel: Fix PEBS-via-PT reload base value for Extended PEBSLike Xu2021-06-231-6/+14
| * | | perf/x86: Reset the dirty counter to prevent the leak for an RDPMC taskKan Liang2021-06-172-1/+28
| * | | perf/x86/intel/uncore: Enable I/O stacks to IIO PMON mapping on ICXAlexander Antonov2021-05-181-0/+51
| * | | perf/x86/intel/uncore: Enable I/O stacks to IIO PMON mapping on SNRAlexander Antonov2021-05-181-0/+96
| * | | perf/x86/intel/uncore: Generalize I/O stacks to PMON mapping procedureAlexander Antonov2021-05-182-6/+21
| * | | perf/x86/intel/uncore: Drop unnecessary NULL checks after container_of()Guenter Roeck2021-05-121-4/+0
* | | | Merge tag 'x86_cpu_for_v5.14_rc1' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2021-06-282-5/+9
|\ \ \ \ | |_|_|/ |/| | |
| * | | x86/events/intel: Do not deploy TSX force abort workaround when TSX is deprec...Pawan Gupta2021-06-151-1/+7
| * | | perf/x86/rapl: Use CPUID bit on AMD and Hygon partsAndrew Cooper2021-06-011-4/+2
| |/ /
* | / perf/x86/intel/lbr: Zero the xstate buffer on allocationThomas Gleixner2021-06-241-1/+2
| |/ |/|
* | perf/x86/intel/uncore: Fix M2M event umask for Ice Lake serverKan Liang2021-06-011-1/+2
* | perf/x86/intel/uncore: Fix a kernel WARNING triggered by maxcpus=1Kan Liang2021-05-311-2/+4
* | perf/x86/lbr: Remove cpuc->lbr_xsave allocation from atomic contextLike Xu2021-05-183-8/+30
* | perf/x86: Avoid touching LBR_TOS MSR for Arch LBRLike Xu2021-05-181-1/+1
|/
* Merge tag 'perf_urgent_for_v5.13_rc1' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds2021-05-091-21/+26
|\
| * x86/events/amd/iommu: Fix invalid Perf result due to IOMMU PMC power-gatingSuravee Suthikulpanit2021-05-061-21/+26
* | Merge tag 'iommu-updates-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2021-05-012-19/+1
|\ \ | |/ |/|
| *-. Merge branches 'iommu/fixes', 'arm/mediatek', 'arm/smmu', 'arm/exynos', 'unis...Joerg Roedel2021-04-162-19/+1
| |\ \
| | | * iommu/amd: Move a few prototypes to include/linux/amd-iommu.hChristoph Hellwig2021-04-072-19/+1
| | |/
* | | Merge tag 'perf-core-2021-04-28' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2021-04-2818-270/+2155
|\ \ \
| * | | perf/x86: Allow for 8<num_fixed_counters<16Colin Ian King2021-04-231-1/+1
| * | | perf/x86/rapl: Add support for Intel Alder LakeZhang Rui2021-04-191-0/+2
| * | | perf/x86/cstate: Add Alder Lake CPU supportKan Liang2021-04-191-10/+29
| * | | perf/x86/msr: Add Alder Lake CPU supportKan Liang2021-04-191-0/+2
| * | | perf/x86/intel/uncore: Add Alder Lake supportKan Liang2021-04-193-0/+139
| * | | perf: Extend PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHEKan Liang2021-04-191-0/+1
| * | | perf/x86/intel: Add Alder Lake Hybrid supportKan Liang2021-04-193-1/+268
| * | | perf/x86: Support filter_match callbackKan Liang2021-04-192-0/+11
| * | | perf/x86/intel: Add attr_update for Hybrid PMUsKan Liang2021-04-191-6/+114
| * | | perf/x86: Add structures for the attributes of Hybrid PMUsKan Liang2021-04-192-0/+62
| * | | perf/x86: Register hybrid PMUsKan Liang2021-04-193-21/+223
| * | | perf/x86: Factor out x86_pmu_show_pmu_capKan Liang2021-04-192-9/+19
| * | | perf/x86: Remove temporary pmu assignment in event_initKan Liang2021-04-191-11/+0
| * | | perf/x86/intel: Factor out intel_pmu_check_extra_regsKan Liang2021-04-191-14/+21
| * | | perf/x86/intel: Factor out intel_pmu_check_event_constraintsKan Liang2021-04-191-35/+47
| * | | perf/x86/intel: Factor out intel_pmu_check_num_countersKan Liang2021-04-191-14/+24
| * | | perf/x86: Hybrid PMU support for extra_regsKan Liang2021-04-193-8/+13
| * | | perf/x86: Hybrid PMU support for event constraintsKan Liang2021-04-194-5/+10
| * | | perf/x86: Hybrid PMU support for hardware cache eventKan Liang2021-04-192-3/+11
| * | | perf/x86: Hybrid PMU support for unconstrainedKan Liang2021-04-192-1/+12
generated by cgit v1.2.3 (git 2.25.1) at 2024-08-08 11:27:34 +0000