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path: root/arch/x86/include/asm/cpufeatures.h
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* x86/bugs: Add ITLB_MULTIHIT bug infrastructureVineela Tummalapalli2019-11-121-0/+1
* x86/speculation/taa: Add mitigation for TSX Async AbortPawan Gupta2019-11-121-0/+1
* x86/speculation/swapgs: Exclude ATOMs from speculation through SWAPGSThomas Gleixner2019-08-061-0/+1
* x86/speculation: Prepare entry code for Spectre v1 swapgs mitigationsJosh Poimboeuf2019-08-061-0/+2
* x86/cpufeatures: Combine word 11 and 12 into a new scattered features wordFenghua Yu2019-08-061-7/+10
* x86/cpufeatures: Add FDP_EXCPTN_ONLY and ZERO_FCS_FDSAaron Lewis2019-07-261-0/+2
* x86/speculation/mds: Add BUG_MSBDS_ONLYThomas Gleixner2019-05-141-0/+1
* x86/speculation/mds: Add basic bug infrastructure for MDSAndi Kleen2019-05-141-0/+2
* x86: Add TSX Force Abort CPUID/MSRPeter Zijlstra (Intel)2019-03-131-0/+1
* Merge branch 'l1tf-final' of git://git.kernel.org/pub/scm/linux/kernel/git/ti...Linus Torvalds2018-08-141-1/+4
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| * x86/cpufeatures: Add detection of L1D cache flush support.Konrad Rzeszutek Wilk2018-06-211-0/+1
| * x86/speculation/l1tf: Add sysfs reporting for l1tfAndi Kleen2018-06-201-0/+2
* | Merge branch 'x86/pti' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds2018-08-131-0/+1
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| * | x86/speculation: Support Enhanced IBRS on future CPUsSai Praneeth2018-08-031-0/+1
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* / x86/cpufeatures: Add EPT_AD feature bitPeter Feiner2018-08-031-1/+1
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* x86/bugs: Add AMD's SPEC_CTRL MSR usageKonrad Rzeszutek Wilk2018-06-061-0/+1
* x86/bugs: Add AMD's variant of SSB_NOKonrad Rzeszutek Wilk2018-06-061-0/+1
* x86/speculation: Add virtualized speculative store bypass disable supportTom Lendacky2018-05-171-0/+1
* x86/cpufeatures: Add FEATURE_ZENThomas Gleixner2018-05-171-0/+1
* x86/cpufeatures: Disentangle SSBD enumerationThomas Gleixner2018-05-171-4/+3
* x86/cpufeatures: Disentangle MSR_SPEC_CTRL enumeration from IBRSThomas Gleixner2018-05-171-0/+1
* x86/speculation: Use synthetic bits for IBRS/IBPB/STIBPBorislav Petkov2018-05-171-4/+6
* x86/bugs: Rename _RDS to _SSBDKonrad Rzeszutek Wilk2018-05-091-2/+2
* x86/bugs/AMD: Add support to disable RDS on Fam[15,16,17]h if requestedKonrad Rzeszutek Wilk2018-05-031-0/+1
* x86/bugs: Provide boot parameters for the spec_store_bypass_disable mitigationKonrad Rzeszutek Wilk2018-05-031-0/+1
* x86/cpufeatures: Add X86_FEATURE_RDSKonrad Rzeszutek Wilk2018-05-031-0/+1
* x86/bugs: Expose /sys/../spec_store_bypassKonrad Rzeszutek Wilk2018-05-031-0/+1
* x86/cpufeatures: Enumerate cldemote instructionFenghua Yu2018-04-261-0/+1
* x86/cpufeatures: Add Intel PCONFIG cpufeatureKirill A. Shutemov2018-03-121-0/+1
* x86/cpufeatures: Add Intel Total Memory Encryption cpufeatureKirill A. Shutemov2018-03-121-0/+1
* x86/speculation: Use IBRS if available before calling into firmwareDavid Woodhouse2018-02-201-0/+1
* Merge branch 'x86/hyperv' of git://git.kernel.org/pub/scm/linux/kernel/git/ti...Radim Krčmář2018-02-011-6/+24
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| * Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2018-01-291-6/+16
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| | * x86/cpufeatures: Clean up Spectre v2 related CPUID flagsDavid Woodhouse2018-01-271-9/+9
| | * x86/speculation: Add basic IBPB (Indirect Branch Prediction Barrier) supportDavid Woodhouse2018-01-261-0/+2
| | * x86/cpufeatures: Add AMD feature bits for Speculation ControlDavid Woodhouse2018-01-261-0/+3
| | * x86/cpufeatures: Add Intel feature bits for Speculation ControlDavid Woodhouse2018-01-261-0/+3
| | * x86/cpufeatures: Add CPUID_7_EDX CPUID leafDavid Woodhouse2018-01-261-3/+5
| * | x86/intel_rdt: Enumerate L2 Code and Data Prioritization (CDP) featureFenghua Yu2018-01-181-0/+1
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| * x86/cpufeature: Move processor tracing out of scattered featuresPaolo Bonzini2018-01-171-1/+1
| * x86/retpoline: Fill RSB on context switch for affected CPUsDavid Woodhouse2018-01-151-0/+1
| * x86/retpoline: Add initial retpoline supportDavid Woodhouse2018-01-121-0/+2
| * x86/cpufeatures: Add X86_BUG_SPECTRE_V[12]David Woodhouse2018-01-061-0/+2
| * x86/pti: Rename BUG_CPU_INSECURE to BUG_CPU_MELTDOWNThomas Gleixner2018-01-051-1/+1
| * x86/mm: Use INVPCID for __native_flush_tlb_single()Dave Hansen2017-12-231-0/+1
| * x86/cpufeatures: Add X86_BUG_CPU_INSECUREThomas Gleixner2017-12-231-1/+2
| * x86: Make X86_BUG_FXSAVE_LEAK detectable in CPUID on AMDRudolf Marek2017-12-171-0/+1
| * x86/cpufeature: Add User-Mode Instruction Prevention definitionsRicardo Neri2017-12-171-0/+1
* | Merge branch 'sev-v9-p2' of https://github.com/codomania/kvmPaolo Bonzini2018-01-161-0/+1
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| * | x86/CPU/AMD: Add the Secure Encrypted Virtualization CPU featureTom Lendacky2017-12-041-0/+1
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