summaryrefslogtreecommitdiffstats
path: root/arch/x86/kernel/cpu/mcheck/mce_amd.c
Commit message (Expand)AuthorAgeFilesLines
* x86/mce: Fix -Wmissing-prototypes warningsBorislav Petkov2019-01-261-2/+3
* x86/MCE/AMD: Fix the thresholding machinery initialization orderBorislav Petkov2018-12-051-13/+6
* x86/MCE/AMD: Cache SMCA MISC block addressesBorislav Petkov2018-06-051-15/+14
* x86/mce/AMD: Carve out SMCA get_block_address() codeYazen Ghannam2018-06-051-26/+31
* x86/mce/AMD: Get address from already initialized blockYazen Ghannam2018-04-191-0/+15
* x86/mce/AMD, EDAC/mce_amd: Enumerate Reserved SMCA bank typeYazen Ghannam2018-04-191-0/+7
* x86/mce/AMD: Pass the bank number to smca_get_bank_type()Yazen Ghannam2018-04-191-8/+7
* x86/MCE: Report only DRAM ECC as memory errors on AMD systemsYazen Ghannam2018-04-191-0/+11
* x86/MCE/AMD: Define a function to get SMCA bank typeYazen Ghannam2018-04-191-0/+14
* x86/mce: Hide mca_cfgBorislav Petkov2017-10-051-0/+2
* Merge branch 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2017-09-041-14/+2
|\
| * x86/mce: Remove duplicated tracing interrupt codeThomas Gleixner2017-08-291-14/+2
* | x86/mce/AMD: Allow any CPU to initialize the smca_banks arrayYazen Ghannam2017-07-251-7/+2
|/
* x86/mce/AMD: Use saved threshold block info in interrupt handlerYazen Ghannam2017-06-141-31/+35
* x86/mce/AMD: Use msr_stat when clearing MCA_STATUSYazen Ghannam2017-06-141-1/+1
* x86/mce/AMD: Carve out SMCA bank configurationYazen Ghannam2017-05-211-38/+38
* x86/mce/AMD: Redo error logging from APIC LVT interrupt handlersYazen Ghannam2017-05-211-73/+74
* x86/mce: Convert threshold_bank.cpus from atomic_t to refcount_tElena Reshetova2017-05-211-3/+3
* x86/mce/AMD: Give a name to MCA bank 3 when accessed with legacy MSRsYazen Ghannam2017-03-311-1/+1
* Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds2017-02-281-2/+2
|\
| * x86/irq, trace: Add __irq_entry annotation to x86's platform IRQ handlersDaniel Bristot de Oliveira2017-01-051-2/+2
* | x86/ras: Flip the TSC-adding logicBorislav Petkov2017-01-241-1/+2
* | x86/ras/amd: Make sysfs names of banks more user-friendlyYazen Ghannam2017-01-241-1/+5
|/
* x86/mce/AMD: Make the init code more robustThomas Gleixner2016-12-261-0/+3
* Merge branch 'smp-hotplug-for-linus' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2016-12-121-42/+42
|\
| * x86/MCE/AMD: Fix thinko about thresholding_enBorislav Petkov2016-11-211-2/+3
| * x86/mcheck: Split threshold_cpu_callback into two callbacksSebastian Andrzej Siewior2016-11-161-23/+15
| * x86/mcheck: Be prepared for a rollback back to the ONLINE stateSebastian Andrzej Siewior2016-11-161-0/+4
| * x86/mcheck: Explicit cleanup on failure in mce_amdSebastian Andrzej Siewior2016-11-161-2/+5
| * x86/mcheck: Move threshold_create_device()Sebastian Andrzej Siewior2016-11-161-25/+25
* | Merge branch 'x86-idle-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2016-12-121-1/+0
|\ \
| * | x86: Remove empty idle.h headerThomas Gleixner2016-12-091-1/+0
| |/
* | x86/mce/AMD: Add system physical address translation for AMD Fam17hYazen Ghannam2016-11-221-0/+200
* | x86/mce/AMD: Reset Threshold Limit after logging errorYazen Ghannam2016-11-161-0/+6
* | x86/RAS: Hide SMCA bank namesBorislav Petkov2016-11-081-3/+29
* | x86/RAS: Rename smca_bank_names to smca_namesBorislav Petkov2016-11-081-3/+3
* | x86/RAS: Simplify SMCA HWID descriptor structBorislav Petkov2016-11-081-15/+9
* | x86/RAS: Simplify SMCA bank descriptor structBorislav Petkov2016-11-081-5/+5
|/
* x86/mce/AMD: Extract the error address on SMCA systemsYazen Ghannam2016-09-131-1/+12
* x86/mce/AMD: Save MCA_IPID in MCE struct on SMCA systemsYazen Ghannam2016-09-131-2/+6
* x86/mce/AMD: Ensure the deferred error interrupt is of type APIC on SMCA systemsYazen Ghannam2016-09-131-0/+14
* x86/mce/AMD: Update sysfs bank names for SMCA systemsYazen Ghannam2016-09-131-2/+47
* x86/mce/AMD, EDAC/mce_amd: Define and use tables for known SMCA IP typesYazen Ghannam2016-09-131-25/+79
* x86/mce/AMD: Read MSRs on the CPU allocating the threshold blocksYazen Ghannam2016-09-131-9/+8
* x86/mce: Add support for new MCA_SYND registerYazen Ghannam2016-09-131-0/+3
* x86/mce/AMD: Use msr_ops.misc() in allocate_threshold_blocks()Yazen Ghannam2016-09-131-1/+1
* x86/mce/AMD: Increase size of the bank_map typeAravind Gopalakrishnan2016-07-081-1/+1
* x86/mce/AMD: Save an indentation level in prepare_threshold_block()Borislav Petkov2016-05-121-40/+38
* x86/mce/AMD: Disable LogDeferredInMcaStat for SMCA systemsYazen Ghannam2016-05-121-9/+29
* x86/mce/AMD: Log Deferred Errors using SMCA MCA_DE{STAT,ADDR} registersYazen Ghannam2016-05-121-8/+24
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-29 18:44:51 +0000