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* x86/mm/tlb: Revert "x86/mm: Align TLB invalidation info"Peter Zijlstra2019-05-081-1/+1
* x86/speculation: Prepare for conditional IBPB in switch_mm()Thomas Gleixner2018-12-051-28/+86
* x86/speculation: Apply IBPB more strictly to avoid cross-process data leakJiri Kosina2018-12-051-11/+20
* x86/nmi: Fix NMI uaccess race against CR3 switchingAndy Lutomirski2018-08-311-0/+7
* x86/mm/tlb: Revert the recent lazy TLB patchesPeter Zijlstra2018-08-221-152/+53
* x86/mm/tlb: Make clear_asid_other() staticzhong jiang2018-07-241-1/+1
* x86/mm/tlb: Skip atomic operations for 'init_mm' in switch_mm_irqs_off()Rik van Riel2018-07-171-5/+12
* x86/mm/tlb: Always use lazy TLB modeRik van Riel2018-07-171-14/+1
* x86/mm/tlb: Only send page table free TLB flush to lazy TLB CPUsRik van Riel2018-07-171-4/+39
* x86/mm/tlb: Make lazy TLB mode lazierRik van Riel2018-07-171-9/+59
* x86/mm/tlb: Restructure switch_mm_irqs_off()Rik van Riel2018-07-171-30/+30
* x86/mm/tlb: Leave lazy TLB mode at page table free timeRik van Riel2018-07-171-0/+27
* x86/mm: Stop pretending pgtable_l5_enabled is a variableKirill A. Shutemov2018-05-191-1/+1
* Merge tag 'v4.16-rc3' into x86/mm, to pick up fixesIngo Molnar2018-02-261-3/+3
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| * Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds2018-02-141-3/+3
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| | * x86/mm: Rename flush_tlb_single() and flush_tlb_one() to __flush_tlb_one_[use...Andy Lutomirski2018-02-151-3/+3
* | | x86/mm: Replace compile-time checks for 5-level paging with runtime-time checksKirill A. Shutemov2018-02-161-1/+1
* | | x86/mm: Align TLB invalidation infoNadav Amit2018-02-131-1/+1
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* | Merge branch 'linus' into sched/urgent, to resolve conflictsIngo Molnar2018-02-061-1/+32
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| * x86/speculation: Use Indirect Branch Prediction Barrier in context switchTim Chen2018-01-301-1/+32
* | membarrier/x86: Provide core serializing commandMathieu Desnoyers2018-02-051-3/+4
* | membarrier: Document scheduler barrier requirementsMathieu Desnoyers2018-02-051-0/+5
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* x86/mm/64: Fix vmapped stack syncing on very-large-memory 4-level systemsAndy Lutomirski2018-01-261-5/+29
* x86/mm: Use/Fix PCID to optimize user/kernel switchesPeter Zijlstra2017-12-231-0/+1
* x86/mm: Abstract switching CR3Dave Hansen2017-12-231-2/+20
* x86/mm: Allow flushing for future ASID switchesDave Hansen2017-12-231-0/+35
* x86/mm: Move the CR3 construction functions to tlbflush.hDave Hansen2017-12-221-4/+4
* x86/mm: Use __flush_tlb_one() for kernel memoryPeter Zijlstra2017-12-221-1/+1
* Revert "x86/mm: Stop calling leave_mm() in idle code"Andy Lutomirski2017-11-041-3/+14
* x86/mm: Remove debug/x86/tlb_defer_switch_to_init_mmAndy Lutomirski2017-10-181-58/+0
* x86/mm: Tidy up "x86/mm: Flush more aggressively in lazy TLB mode"Andy Lutomirski2017-10-181-12/+18
* x86/mm/64: Remove the last VM_BUG_ON() from the TLB codeAndy Lutomirski2017-10-181-2/+2
* x86/mm: Flush more aggressively in lazy TLB modeAndy Lutomirski2017-10-141-42/+111
* x86/asm: Use register variable to get stack pointer valueAndrey Ryabinin2017-09-291-1/+1
* x86/mm: Factor out CR3-building codeAndy Lutomirski2017-09-171-6/+5
* x86/mm: Get rid of VM_BUG_ON in switch_tlb_irqs_off()Andy Lutomirski2017-09-131-1/+21
* x86/mm/64: Fix an incorrect warning with CONFIG_DEBUG_VM=y, !PCIDAndy Lutomirski2017-09-101-1/+1
* x86/mm: Reinitialize TLB state on hotplug and resumeAndy Lutomirski2017-09-061-0/+44
* x86/mm: Implement PCID based optimization: try to preserve old TLB entries us...Andy Lutomirski2017-07-251-16/+64
* x86/mm: Provide general kernel support for memory encryptionTom Lendacky2017-07-181-2/+2
* x86/mm: Stop calling leave_mm() in idle codeAndy Lutomirski2017-07-051-17/+3
* x86/mm: Rework lazy TLB mode and TLB freshness trackingAndy Lutomirski2017-07-051-79/+118
* x86/mm: Track the TLB's tlb_gen and update the flushing algorithmAndy Lutomirski2017-07-051-7/+95
* x86/mm: Give each mm TLB flush generation a unique IDAndy Lutomirski2017-07-051-2/+4
* x86/mm: Delete a big outdated comment about TLB flushingAndy Lutomirski2017-06-301-36/+0
* x86/mm: Don't reenter flush_tlb_func_common()Andy Lutomirski2017-06-301-2/+15
* x86/ldt: Simplify the LDT switching logicAndy Lutomirski2017-06-221-18/+2
* x86/mm: Be more consistent wrt PAGE_SHIFT vs PAGE_SIZE in tlb flush codeAndy Lutomirski2017-06-051-3/+2
* x86/mm: Rework lazy TLB to track the actual loaded mmAndy Lutomirski2017-06-051-108/+108
* x86/mm: Remove the UP asm/tlbflush.h code, always use the (formerly) SMP codeAndy Lutomirski2017-06-051-15/+2
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