| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| |
|
|
|
|
|
|
|
|
| |
Unaligned exception handler is needed in configurations with hardware
support for unaligned access when the load/store exception handler is
enabled because such configurations would still raise an exception on
unaligned access through the instruction bus.
Fixes: f29cf77609cc ("xtensa: add load/store exception handler")
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
|
| |
|
|
|
|
|
|
|
|
|
| |
Memory attached to instruction bus of the xtensa CPU is only accessible
for a limited subset of opcodes. Other opcodes generate an exception
with the load/store error cause code. This property complicates use of
such systems. Provide a handler that recognizes and transparently fixes
such exceptions. The following opcodes are recognized when used outside
of FLIX bundles: l32i, l32i.n, l16ui, l16si, l8ui.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
- extract initialization part of the exception handler into a separate
function.
- use single label for invalid instruction instead of two labels, one
for load and one for store, at one place.
- use sext instruction for sign extension when available.
- store SAR on the stack instead of in a0.
- replace numeric labels for load and store writeback with .Lload_w and
.Lstore_w respectively.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
|
| |
|
|
|
|
|
|
|
| |
xtensa core may be configured without register windows support, don't
use register window specific opcodes in that case. Use window register
specific opcodes to initialize hardware or reset core to a known state
regardless of the chosen ABI.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
|
| |
|
|
|
|
|
| |
Remove duplicate definitions of ALIGN/src_b/__src_b and SSA8/ssa8/__ssa8
from assembly sources and put single definition into asm/asmmacro.h
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
|
| |
|
|
|
|
|
|
|
|
|
|
| |
vmlinux.lds.S doesn't do anything special with literals, so instead of
keeping them separate put them into the corresponding text sections.
Drop explicit .literal sections from the vmlinux.lds.S, use standard
section macros. Mark literal pool locations in the assembly sources.
Unfortunately assembler doesn't put literals into .init sections and
external libgcc may still have .literal sections, so sed transformation
to the linker script is still needed.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
|
| |
|
|
|
|
|
|
| |
Update icount when icountlevel is non-zero but not greater than EXCM level
when load/store instruction is successfully emulated. This allows
single-stepping over such instruction in userspace debugger.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
|
| |
|
|
|
|
|
|
| |
With this change a threaded jump from .Linvalid_instruction_load to
.Linvalid_instruction can be removed and more code may be added to
common load/store exit path.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
|
| |
|
|
|
|
|
|
|
|
| |
fast_unaligned may encounter DTLB miss or SEGFAULT during the store
emulation. Don't update epc1 and lcount until after the store emulation
is complete, so that the faulting store instruction could be replayed.
Remove duplicate code handling zero overhead loops and calculate new
epc1 and lcount in one place.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
|
| |
|
|
|
|
|
|
| |
fast_unaligned_fixup restores user registers and runs normal exception
handler in the current stack frame. Unaligned load/store is retried
after that.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
|
| |
|
|
|
|
| |
Use correct register (a0, just read from the PS) to check user mode bit.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
|
| |
|
|
|
|
|
|
|
| |
Based on the SMP patch by Joe Taylor and subsequent fixes.
Preserve exception table pointer (normally stored in excsave1 SR) as it
cannot be easily restored in SMP environment.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
|
| |
|
|
|
|
|
| |
Remove heading and trailing spaces, trim trailing lines, and wrap lines
that are longer than 80 characters.
Signed-off-by: Chris Zankel <chris@zankel.net>
|
| |
|
|
|
|
| |
Use ENDPROC() to mark the end of assembler functions.
Signed-off-by: Chris Zankel <chris@zankel.net>
|
| |
|
|
|
|
|
|
|
|
| |
- reference SRs by names where possible, not by numbers;
- get rid of __stringify around SR names where possible;
- remove unneeded SR names from asm/regs.h;
- add SREG_ prefix to remaining SR names;
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
|
| |
|
|
|
|
|
|
|
|
|
| |
The Xtensa port contained many header files that were never needed. This
rather lengthy patch removes all those files. Unfortunately, there were
many dependencies that needed to be updated, so this patch touches quite a
few source files.
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
| |
|
|
|
|
| |
Delete obsoleted parts form arch makefiles and rename to asm-offsets.h
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
|
|
|
The attached patches provides part 3 of an architecture implementation for the
Tensilica Xtensa CPU series.
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
