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* x86/pti: Unbreak EFI old_memmapJiri Kosina2018-01-061-0/+2
* x86/pti: Rename BUG_CPU_INSECURE to BUG_CPU_MELTDOWNThomas Gleixner2018-01-053-5/+5
* x86/alternatives: Add missing '\n' at end of ALTERNATIVE inline asmDavid Woodhouse2018-01-051-2/+2
* x86/tlb: Drop the _GPL from the cpu_tlbstate exportThomas Gleixner2018-01-051-1/+1
* x86/events/intel/ds: Use the proper cache flush method for mapping ds buffersPeter Zijlstra2018-01-051-0/+16
* x86/kaslr: Fix the vaddr_end messThomas Gleixner2018-01-052-24/+16
* x86/mm: Map cpu_entry_area at the same place on 4/5 levelThomas Gleixner2018-01-042-3/+3
* x86/mm: Set MODULES_END to 0xffffffffff000000Andrey Ryabinin2018-01-041-1/+1
* x86/process: Define cpu_tss_rw in same section as declarationNick Desaulniers2018-01-031-1/+1
* x86/pti: Switch to kernel CR3 at early in entry_SYSCALL_compat()Thomas Gleixner2018-01-031-7/+6
* x86/dumpstack: Print registers for first stack frameJosh Poimboeuf2018-01-031-1/+2
* x86/dumpstack: Fix partial register dumpsJosh Poimboeuf2018-01-033-13/+34
* x86/pti: Make sure the user/kernel PTEs matchThomas Gleixner2018-01-031-1/+2
* x86/cpu, x86/pti: Do not enable PTI on AMD processorsTom Lendacky2018-01-031-2/+2
* x86/ldt: Make LDT pgtable free conditionalThomas Gleixner2017-12-311-1/+2
* x86/ldt: Plug memory leak in error pathThomas Gleixner2017-12-311-1/+7
* x86/mm: Remove preempt_disable/enable() from __native_flush_tlb()Thomas Gleixner2017-12-311-6/+8
* x86/smpboot: Remove stale TLB flush invocationsThomas Gleixner2017-12-311-9/+0
* x86/ldt: Make the LDT mapping ROThomas Gleixner2017-12-233-10/+10
* x86/mm/dump_pagetables: Allow dumping current pagetablesThomas Gleixner2017-12-233-6/+73
* x86/mm/dump_pagetables: Check user space page table for WX pagesThomas Gleixner2017-12-233-6/+27
* x86/mm/dump_pagetables: Add page table directory to the debugfs VFS hierarchyBorislav Petkov2017-12-231-5/+10
* x86/dumpstack: Indicate in Oops whether PTI is configured and enabledVlastimil Babka2017-12-231-2/+4
* x86/mm: Clarify the whole ASID/kernel PCID/user PCID namingPeter Zijlstra2017-12-231-12/+43
* x86/mm: Use INVPCID for __native_flush_tlb_single()Dave Hansen2017-12-233-28/+60
* x86/mm: Optimize RESTORE_CR3Peter Zijlstra2017-12-232-4/+30
* x86/mm: Use/Fix PCID to optimize user/kernel switchesPeter Zijlstra2017-12-239-33/+162
* x86/mm: Abstract switching CR3Dave Hansen2017-12-231-2/+20
* x86/mm: Allow flushing for future ASID switchesDave Hansen2017-12-232-8/+64
* x86/pti: Map the vsyscall page if neededAndy Lutomirski2017-12-233-3/+69
* x86/pti: Put the LDT in its own PGD if PTI is onAndy Lutomirski2017-12-235-16/+218
* x86/mm/64: Make a full PGD-entry size hole in the memory mapAndy Lutomirski2017-12-231-2/+2
* x86/events/intel/ds: Map debug buffers in cpu_entry_areaHugh Dickins2017-12-232-45/+82
* x86/cpu_entry_area: Add debugstore entries to cpu_entry_areaThomas Gleixner2017-12-235-21/+81
* x86/mm/pti: Map ESPFIX into user spaceAndy Lutomirski2017-12-231-0/+11
* x86/mm/pti: Share entry text PMDThomas Gleixner2017-12-231-0/+10
* x86/entry: Align entry text section to PMD boundaryThomas Gleixner2017-12-231-0/+8
* x86/mm/pti: Share cpu_entry_area with user space page tablesAndy Lutomirski2017-12-231-0/+25
* x86/mm/pti: Force entry through trampoline when PTI activeThomas Gleixner2017-12-231-1/+4
* x86/mm/pti: Add functions to clone kernel PMDsAndy Lutomirski2017-12-231-0/+127
* x86/mm/pti: Populate user PGDDave Hansen2017-12-231-1/+8
* x86/mm/pti: Allocate a separate user PGDDave Hansen2017-12-234-6/+45
* x86/mm/pti: Allow NX poison to be set in p4d/pgdDave Hansen2017-12-231-2/+12
* x86/mm/pti: Add mapping helper functionsDave Hansen2017-12-233-1/+138
* x86/pti: Add the pti= cmdline option and documentationBorislav Petkov2017-12-231-1/+25
* x86/mm/pti: Add infrastructure for page table isolationThomas Gleixner2017-12-236-3/+114
* x86/mm/pti: Prepare the x86/entry assembly code for entry/exit CR3 switchingDave Hansen2017-12-233-7/+128
* x86/mm/pti: Disable global pages if PAGE_TABLE_ISOLATION=yDave Hansen2017-12-231-3/+9
* x86/cpufeatures: Add X86_BUG_CPU_INSECUREThomas Gleixner2017-12-233-2/+13
* x86/cpu_entry_area: Prevent wraparound in setup_cpu_entry_area_ptes() on 32bitThomas Gleixner2017-12-231-1/+2
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