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* x86-64, NUMA: Move apicid to numa mapping initialization from amd_scan_nodes(...Tejun Heo2011-02-161-20/+23
* x86-64, NUMA: Remove local variable found from amd_numa_init()Tejun Heo2011-02-161-4/+2
* x86-64, NUMA: Use common {cpu|mem}_nodes_parsedTejun Heo2011-02-164-24/+31
* x86-64, NUMA: Restructure initmem_init()Tejun Heo2011-02-162-46/+52
* x86, NUMA: Move *_numa_init() invocations into initmem_init()Tejun Heo2011-02-166-20/+20
* x86-64, NUMA: Wrap acpi_numa_init() so that failure can be indicated by retur...Tejun Heo2011-02-163-1/+12
* x86-64, NUMA: Unify {acpi|amd}_{numa_init|scan_nodes}() arguments and return ...Tejun Heo2011-02-166-16/+16
* x86, NUMA: Drop @start/last_pfn from initmem_init()Tejun Heo2011-02-166-23/+14
* x86-64, NUMA: Simplify hotplug node handling in acpi_numa_memory_affinity_init()Tejun Heo2011-02-161-18/+13
* x86-64, NUMA: Make dummy node initialization path similar to non-dummy onesTejun Heo2011-02-161-2/+3
* Merge branch 'x86/amd-nb' into x86/mmIngo Molnar2011-02-166-25/+154
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| * x86, amd: Initialize variable properlyBorislav Petkov2011-02-151-3/+3
| * x86: Adjust section placement in AMD northbridge related codeJan Beulich2011-02-103-5/+6
| * x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUsHans Rosenfeld2011-02-073-15/+127
| * x86, amd: Extend AMD northbridge caching code to support "Link Control" devicesHans Rosenfeld2011-01-262-2/+10
| * x86, amd: Enable L3 cache index disable on family 0x15Hans Rosenfeld2011-01-261-0/+3
| * x86, amd: Normalize compute unit IDs on multi-node processorsAndreas Herrmann2011-01-262-2/+7
* | Merge branch 'x86/numa' into x86/mmIngo Molnar2011-02-1634-488/+504
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| * | x86, numa: Add error handling for bad cpu-to-node mappingsDavid Rientjes2011-02-142-0/+8
| * | Merge commit 'v2.6.38-rc4' into x86/numaIngo Molnar2011-02-1457-266/+385
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| * | | x86: Rename incorrectly named parameter of numa_cpu_node()Tejun Heo2011-01-311-1/+1
| * | | x86: Fix build failure on X86_UP_APICTejun Heo2011-01-282-3/+1
| * | | x86: Unify NUMA initialization between 32 and 64bitTejun Heo2011-01-286-84/+77
| * | | x86: Unify node_to_cpumask_map handling between 32 and 64bitTejun Heo2011-01-287-115/+87
| * | | x86: Unify CPU -> NUMA node mapping between 32 and 64bitTejun Heo2011-01-2811-104/+85
| * | | x86: Unify cpu/apicid <-> NUMA node mapping between 32 and 64bitTejun Heo2011-01-2815-56/+101
| * | | x86: Replace apic->apicid_to_node() with ->x86_32_numa_cpu_node()Tejun Heo2011-01-2813-41/+37
| * | | x86: Implement x86_32_early_logical_apicid() for numaq_32Tejun Heo2011-01-281-2/+8
| * | | x86: Implement x86_32_early_logical_apicid() for summit_32Tejun Heo2011-01-281-5/+12
| * | | x86: Implement x86_32_early_logical_apicid() for bigsmp_32Tejun Heo2011-01-281-1/+7
| * | | x86: Implement the default x86_32_early_logical_apicid()Tejun Heo2011-01-281-1/+6
| * | | x86: Add apic->x86_32_early_logical_apicid()Tejun Heo2011-01-288-2/+45
| * | | x86: Kill apic->cpu_to_logical_apicid()Tejun Heo2011-01-2811-70/+11
| * | | x86: Always use x86_cpu_to_logical_apicid for cpu -> logical apic idTejun Heo2011-01-283-8/+15
| * | | x86: Replace cpu_2_logical_apicid[] with early percpu variableTejun Heo2011-01-288-13/+27
| * | | x86: Make default_send_IPI_mask_sequence/allbutself_logical() 32bit onlyTejun Heo2011-01-282-6/+6
| * | | x86: Drop x86_32 MAX_APICIDTejun Heo2011-01-283-5/+3
| * | | x86: Kill unused static boot_cpu_logical_apicid in smpboot.cTejun Heo2011-01-281-5/+1
* | | | Merge branch 'x86/bootmem' into x86/mmIngo Molnar2011-02-168-108/+145
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| * \ \ \ Merge branch 'linus' into x86/bootmemIngo Molnar2011-02-142601-49785/+103533
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| * | | | | x86-64: Move out cleanup higmap [_brk_end, _end) out of init_memory_mapping()Yinghai Lu2011-01-052-19/+24
| * | | | | x86-64, numa: Put pgtable to local node memoryYinghai Lu2010-12-297-20/+68
| * | | | | x86-64, numa: Allocate memnodemap under max_pfn_mappedYinghai Lu2010-12-291-1/+1
| * | | | | x86: Change get_max_mapped() to inlineYinghai Lu2010-12-292-9/+6
| * | | | | x86-64, gart: Fix allocation with memblockYinghai Lu2010-12-291-17/+16
| * | | | | x86-64, mm: Put early page table highYinghai Lu2010-12-292-42/+30
* | | | | | x86: Emit "mem=nopentium ignored" warning when not supportedKamal Mostafa2011-02-141-2/+5
* | | | | | x86: Fix panic when handling "mem={invalid}" paramKamal Mostafa2011-02-141-0/+3
* | | | | | x86: Avoid tlbstate lock if not enough cpusShaohua Li2011-02-141-7/+4
* | | | | | x86: Scale up the number of TLB invalidate vectors with NR_CPUs, up to 32Shaohua Li2011-02-141-4/+9
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