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| | * | | | | riscv: Replace direct thread flag check with is_compat_task()Leonardo Bras2024-03-192-2/+2
| | * | | | | riscv: Improve arch_get_mmap_end() macroLeonardo Bras2024-03-191-3/+9
| * | | | | | riscv: vector: Fix a typo of preempt_vSong Shuai2024-03-151-2/+2
| * | | | | | Merge patch series "riscv: mm: Extend mappable memory up to hint address"Palmer Dabbelt2024-03-151-16/+11
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| | * | | | | | riscv: mm: Use hint address in mmap if availableCharlie Jenkins2024-03-141-16/+11
| * | | | | | | Merge patch series "riscv: Use Kconfig to set unaligned access speed"Palmer Dabbelt2024-03-158-293/+374
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| | * | | | | | | riscv: Set unaligned access speed at compile timeCharlie Jenkins2024-03-137-296/+359
| | * | | | | | | riscv: Decouple emulated unaligned accesses from access speedCharlie Jenkins2024-03-133-13/+29
| | * | | | | | | riscv: Only check online cpus for emulated accessesCharlie Jenkins2024-03-131-1/+1
| | * | | | | | | riscv: lib: Introduce has_fast_unaligned_access()Charlie Jenkins2024-03-133-11/+13
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| * | | | | | | Merge patch series "Support Andes PMU extension"Palmer Dabbelt2024-03-157-20/+13
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| | * | | | | | | riscv: dts: renesas: Add Andes PMU extension for r9a07g043fYu Chien Peter Lin2024-03-121-1/+1
| | * | | | | | | perf: RISC-V: Introduce Andes PMU to support perf event samplingYu Chien Peter Lin2024-03-123-9/+2
| | * | | | | | | riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTCYu Chien Peter Lin2024-03-121-1/+1
| | * | | | | | | riscv: errata: Rename defines for AndesYu Chien Peter Lin2024-03-124-9/+9
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| * | | | | | | Merge patch "riscv: Fix compilation error with FAST_GUP and rv32"Palmer Dabbelt2024-03-152-60/+7
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| | * | | | | | | riscv: Fix compilation error with FAST_GUP and rv32Alexandre Ghiti2024-03-151-0/+2
| * | | | | | | | RISC-V: fix check for zvkb with tip-of-tree clangEric Biggers2024-02-281-1/+1
| * | | | | | | | Merge commit '3aff0c459e77' into for-nextPalmer Dabbelt2024-02-281-1/+0
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| * | | | | | | | | riscv: defconfig: Enable mmc and dma drivers for T-Head TH1520Drew Fustini2024-02-161-0/+2
| * | | | | | | | | Merge patch series "membarrier: riscv: Core serializing command"Palmer Dabbelt2024-02-154-0/+85
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| | * | | | | | | | | membarrier: riscv: Provide core serializing commandAndrea Parri2024-02-153-0/+51
| | * | | | | | | | | membarrier: riscv: Add full memory barrier in switch_mm()Andrea Parri2024-02-153-0/+34
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| * | | | | | | | | riscv: Avoid code duplication with generic bitops implementationXiao Wang2024-01-241-114/+24
| * | | | | | | | | riscv: Support RANDOMIZE_KSTACK_OFFSETSong Shuai2024-01-242-1/+17
| * | | | | | | | | RISC-V: Remove duplicated include in smpboot.cYang Li2024-01-241-1/+0
| * | | | | | | | | riscv: blacklist assembly symbols for kprobeClément Léger2024-01-242-0/+13
| * | | | | | | | | Merge patch series "riscv: support fast gup"Palmer Dabbelt2024-01-244-8/+71
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| | * | | | | | | | | riscv: enable HAVE_FAST_GUP if MMUJisheng Zhang2024-01-242-0/+7
| | * | | | | | | | | riscv: enable MMU_GATHER_RCU_TABLE_FREE for SMP && MMUJisheng Zhang2024-01-243-5/+37
| | * | | | | | | | | riscv: tlb: convert __p*d_free_tlb() to inline functionsJisheng Zhang2024-01-241-22/+32
| * | | | | | | | | | Merge patch series "riscv: Increase mmap_rnd_bits_max on Sv48/57"Palmer Dabbelt2024-01-241-0/+6
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| | * | | | | | | | | | riscv: mm: Update mmap_rnd_bits_maxSami Tolvanen2024-01-241-0/+6
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| * | | | | | | | | | Revert "RISC-V: mark hibernation as nonportable"Conor Dooley2024-01-231-4/+1
| * | | | | | | | | | Merge patch series "RISC-V crypto with reworked asm files"Palmer Dabbelt2024-01-2222-0/+3271
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| | * | | | | | | | | | crypto: riscv - add vector crypto accelerated SM4Jerry Shih2024-01-224-0/+244
| | * | | | | | | | | | crypto: riscv - add vector crypto accelerated SM3Jerry Shih2024-01-224-0/+250
| | * | | | | | | | | | crypto: riscv - add vector crypto accelerated SHA-{512,384}Jerry Shih2024-01-224-0/+350
| | * | | | | | | | | | crypto: riscv - add vector crypto accelerated SHA-{256,224}Jerry Shih2024-01-224-0/+376
| | * | | | | | | | | | crypto: riscv - add vector crypto accelerated GHASHJerry Shih2024-01-224-0/+253
| | * | | | | | | | | | crypto: riscv - add vector crypto accelerated ChaCha20Jerry Shih2024-01-224-0/+409
| | * | | | | | | | | | crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,CTR,XTS}Jerry Shih2024-01-227-0/+1364
| | * | | | | | | | | | RISC-V: hook new crypto subdir into build-systemHeiko Stuebner2024-01-223-0/+7
| | * | | | | | | | | | RISC-V: add TOOLCHAIN_HAS_VECTOR_CRYPTOEric Biggers2024-01-221-0/+7
| | * | | | | | | | | | RISC-V: add helper function to read the vector VLENHeiko Stuebner2024-01-221-0/+11
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| * | | | | | | | | | RISC-V: build: Allow LTO to be selectedWende Tan2024-01-223-0/+11
| * | | | | | | | | | riscv: remove unneeded #include <asm-generic/export.h>Masahiro Yamada2024-01-211-1/+0
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* | | | | | | | | | Merge tag 'loongarch-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ch...Linus Torvalds2024-03-2243-67/+921
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| * | | | | | | | | | LoongArch/crypto: Clean up useless assignment operationsYuli Wang2024-03-191-2/+0
| * | | | | | | | | | LoongArch: Define the __io_aw() hook as mmiowb()Huacai Chen2024-03-193-18/+3
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