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path: root/drivers/clk/imx
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* clk: imx8mn: fix imx8mn_enet_phy_sels clocks listDario Binacchi2022-12-311-2/+2
* clk: imx8mn: fix imx8mn_sai2_sels clocks listDario Binacchi2022-12-311-1/+1
* clk: imx: replace osc_hdmi with dummyDario Binacchi2022-12-311-6/+6
* clk: imx8mn: rename vpu_pll to m7_alt_pllDario Binacchi2022-12-311-8/+8
* clk: imx: scu: fix memleak on platform_device_add() failsLin Yujun2022-10-261-1/+5
* clk: imx: imx6sx: remove the SET_RATE_PARENT flag for QSPI clocksHan Xu2022-10-051-2/+2
* clk: imx8mp: fix usb_root_clk parentPeng Fan2022-06-221-1/+1
* clk: imx: off by one in imx_lpcg_parse_clks_from_dt()Dan Carpenter2022-04-081-1/+1
* clk: imx7d: Remove audio_mclk_root_clkAbel Vesa2022-04-081-1/+0
* clk: imx8mn: Fix imx8mn_clko1_selsAdam Ford2022-01-271-3/+3
* clk: imx: use module_platform_driverMiles Chen2021-12-142-2/+2
* clk: imx: imx6ul: Move csi_sel mux to correct base registerStefan Riedmueller2021-11-251-1/+1
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2021-09-027-21/+43
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| *-. Merge branches 'clk-kirkwood', 'clk-imx', 'clk-doc', 'clk-zynq' and 'clk-rali...Stephen Boyd2021-09-016-21/+42
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| | | * clk: imx8mn: Add M7 core clockMarek Vasut2021-08-241-0/+5
| | | * clk: imx8m: fix clock tree update of TF-A managed clocksAhmad Fatoum2021-08-245-12/+28
| | | * clk: imx: clk-divider-gate: Switch to clk_divider.determine_rateMartin Blumenstingl2021-08-241-5/+5
| | | * clk: imx8mn: use correct mux type for clkout pathLucas Stach2021-08-241-2/+2
| | | * clk: imx8mm: use correct mux type for clkout pathLucas Stach2021-08-241-2/+2
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| * / clk: fractional-divider: Hide clk_fractional_divider_ops from wide audienceAndy Shevchenko2021-08-121-0/+1
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* / clk: imx6q: fix uart earlycon unworkDong Aisheng2021-08-051-1/+1
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* clk: imx8mq: remove SYS PLL 1/2 clock gatesLucas Stach2021-06-141-38/+18
* clk: imx: scu: Do not enable runtime PM for CPU clksNitin Garg2021-06-141-12/+18
* clk: imx: scu: add parent save and restoreDong Aisheng2021-06-141-1/+28
* clk: imx: scu: Only save DC SS clock using non-cached clock rateAnson Huang2021-06-141-1/+8
* clk: imx: scu: Add A72 frequency scaling supportAnson Huang2021-06-141-1/+3
* clk: imx: scu: Add A53 frequency scaling supportAnson Huang2021-06-141-2/+2
* clk: imx: scu: bypass pi_pll enable status restoreDong Aisheng2021-06-141-1/+1
* clk: imx: scu: detach pd if can't power upDong Aisheng2021-06-141-0/+1
* clk: imx: scu: bypass cpu clock save and restoreDong Aisheng2021-06-141-0/+10
* clk: imx: scu: add parallel port clock opsGuoniu.zhou2021-06-141-0/+8
* clk: imx: scu: add more scu clocksDong Aisheng2021-06-141-2/+150
* clk: imx: scu: add enet rgmii gpr clocksDong Aisheng2021-06-141-4/+18
* clk: imx8qm: add clock valid resource checkingDong Aisheng2021-06-144-1/+119
* clk: imx8qxp: add clock valid checking mechnismDong Aisheng2021-06-145-8/+137
* clk: imx: scu: add gpr clocks supportDong Aisheng2021-06-142-0/+215
* clk: imx: scu: remove legacy scu clock binding supportDong Aisheng2021-06-142-135/+81
* clk: imx: Remove the audio ipg clock from imx8mpJacky Bai2021-06-141-1/+0
* clk: imx: Reference preceded by freeJian Dong2021-04-042-0/+2
* clk: imx8mq: Correct the pcie1 selsRichard Zhu2021-04-041-2/+2
* clk: imx8mp: Remove the none exist pcie clocksRichard Zhu2021-04-041-15/+0
* clk: imx: Fix reparenting of UARTs not associated with stdoutAdam Ford2021-04-0416-252/+54
* Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2021-02-227-15/+74
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| * clk: imx: Move 'imx6sl_set_wait_clk()'s prototype out to accessible headerLee Jones2021-01-301-0/+1
| * clk: imx8mn: add clkout1/2 supportLucas Stach2021-01-301-0/+12
| * clk: imx8mm: add clkout1/2 supportLucas Stach2021-01-301-0/+12
| * clk: imx8mq: add PLL monitor outputLucas Stach2021-01-301-0/+22
| * clk: imx: clk-imx31: Remove unused static const table 'uart_clks'Lee Jones2021-01-291-10/+0
| * clk: imx6q: demote warning about pre-boot ldb_di_clk reparentingAhmad Fatoum2021-01-291-3/+3
| * clk: imx: clk-imx8qxp: Add some SCU clocks support for MIPI-LVDS subsystemsLiu Ying2021-01-051-0/+10
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 07:22:49 +0000